FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Notes to tables:
(1) All timing parameters are described in Tables 32 through 38 in this data sheet.
(2) Using an LE to register the signal may provide a lower setup time.
(3) This parameter is specified by characterization.
Tables 64 through 70 show EPF10K100 device internal and external timing
parameters.
Table 64. EPF10K100 Device LE Timing Microparameters
Note (1)
Symbol
-3DX Speed Grade
-3 Speed Grade
-4 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
tLUT
1.5
0.4
1.6
0.9
0.9
0.2
1.1
1.2
1.1
0.8
1.0
0.5
1.5
0.4
1.6
0.9
0.9
0.2
1.1
1.2
1.1
0.8
1.0
0.5
2.0
0.5
2.0
1.3
1.2
0.3
1.4
1.5
1.3
1.0
1.4
0.7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCLUT
tRLUT
tPACKED
tEN
tCICO
tCGEN
tCGENR
tCASC
tC
tCO
tCOMB
tSU
2.1
2.3
2.1
2.3
2.6
3.1
tH
tPRE
tCLR
tCH
1.0
1.0
1.0
1.0
1.4
1.4
4.0
4.0
4.0
4.0
4.0
4.0
tCL
Altera Corporation
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