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EPF10K30ATC144-3N 参数 Datasheet PDF下载

EPF10K30ATC144-3N图片预览
型号: EPF10K30ATC144-3N
PDF下载: 下载PDF文件 查看货源
内容描述: [Loadable PLD, 0.9ns, CMOS, PQFP144, TQFP-144]
分类和应用: 时钟输入元件可编程逻辑
文件页数/大小: 128 页 / 637 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 10K Embedded Programmable Logic Device Family Data Sheet  
The FLEX 10K architecture is similar to that of embedded gate arrays, the  
fastest-growing segment of the gate array market. As with standard gate  
arrays, embedded gate arrays implement general logic in a conventional  
“sea-of-gates” architecture. In addition, embedded gate arrays have  
dedicated die areas for implementing large, specialized functions. By  
embedding functions in silicon, embedded gate arrays provide reduced  
die area and increased speed compared to standard gate arrays. However,  
embedded megafunctions typically cannot be customized, limiting the  
designer’s options. In contrast, FLEX 10K devices are programmable,  
providing the designer with full control over embedded megafunctions  
and general logic while facilitating iterative design changes during  
debugging.  
Each FLEX 10K device contains an embedded array and a logic array. The  
embedded array is used to implement a variety of memory functions or  
complex logic functions, such as digital signal processing (DSP),  
microcontroller, wide-data-path manipulation, and data-transformation  
functions. The logic array performs the same function as the sea-of-gates  
in the gate array: it is used to implement general logic, such as counters,  
adders, state machines, and multiplexers. The combination of embedded  
and logic arrays provides the high performance and high density of  
embedded gate arrays, enabling designers to implement an entire system  
on a single device.  
FLEX 10K devices are configured at system power-up with data stored in  
an Altera serial configuration device or provided by a system controller.  
Altera offers the EPC1, EPC2, EPC16, and EPC1441 configuration devices,  
which configure FLEX 10K devices via a serial data stream. Configuration  
data can also be downloaded from system RAM or from Altera’s  
BitBlasterTM serial download cable or ByteBlasterMVTM parallel port  
download cable. After a FLEX 10K device has been configured, it can be  
reconfigured in-circuit by resetting the device and loading new data.  
Because reconfiguration requires less than 320 ms, real-time changes can  
be made during system operation.  
FLEX 10K devices contain an optimized interface that permits  
microprocessors to configure FLEX 10K devices serially or in parallel, and  
synchronously or asynchronously. The interface also enables  
microprocessors to treat a FLEX 10K device as memory and configure the  
device by writing to a virtual memory location, making it very easy for the  
designer to reconfigure the device.  
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Altera Corporation