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EP3C120F484C8NES 参数 Datasheet PDF下载

EP3C120F484C8NES图片预览
型号: EP3C120F484C8NES
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 119088 CLBs, 472.5MHz, PBGA484, 23 X 23 MM, 2.60 MM HEIGHT, 1 MM PITCH, LEAD FREE, FBGA-484]
分类和应用: 时钟可编程逻辑
文件页数/大小: 34 页 / 367 K
品牌: ALTERA [ ALTERA CORPORATION ]
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1–10  
Chapter 1: Cyclone III Device Data Sheet  
Electrical Characteristics  
Internal Weak Pull-Up and Weak Pull-Down Resistor  
Table 1–10 lists the weak pull-up and pull-down resistor values for Cyclone III  
devices.  
Table 1–10. Cyclone III Devices Internal Weak Pull-Up and Weak Pull-Down Resistor (Note 1)  
Symbol  
Parameter  
Conditions  
Min  
7
Typ  
25  
28  
35  
57  
82  
143  
19  
22  
25  
35  
50  
Max  
41  
Unit  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
V
CCIO = 3.3 V 5% (2), (3)  
VCCIO = 3.0 V 5% (2), (3)  
VCCIO = 2.5 V 5% (2), (3)  
VCCIO = 1.8 V 5% (2), (3)  
VCCIO = 1.5 V 5% (2), (3)  
VCCIO = 1.2 V 5% (2), (3)  
7
47  
Value of I/O pin pull-up resistor before  
and during configuration, as well as  
user mode if the programmable  
pull-up resistor option is enabled  
8
61  
R_PU  
10  
13  
19  
6
108  
163  
351  
30  
V
CCIO = 3.3 V 5% (4)  
VCCIO = 3.0 V 5% (4)  
VCCIO = 2.5 V 5% (4)  
VCCIO = 1.8 V 5% (4)  
VCCIO = 1.5 V 5% (4)  
6
36  
Value of I/O pin pull-down resistor  
before and during configuration  
R_PD  
6
43  
7
71  
8
112  
Notes to Table 1–10:  
(1) All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pin. Weak pull-down feature is only available for JTAG  
TCK.  
(2) Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO  
.
(3) R_P U = (VCCIO – VI)/IR_PU  
Minimum condition: –40°C; VCCIO = VCC + 5%, VI = VCC + 5% – 50 mV;  
Typical condition: 25°C; VCCIO = VCC, VI = 0 V;  
Maximum condition: 125°C; VCCIO = VCC – 5%, VI = 0 V; in which V refers to the input voltage at the I/O pin.  
I
(4) R_P D = V/IR_PD  
I
Minimum condition: –40°C; VCCIO = VCC + 5%, VI = 50 mV;  
Typical condition: 25°C; VCCIO = VCC, VI = VCC – 5%;  
Maximum condition: 125°C; VCCIO = VCC – 5%, VI = VCC – 5%; in which VI refers to the input voltage at the I/O pin.  
Hot Socketing  
Table 1–11 lists the hot-socketing specifications for Cyclone III devices.  
Table 1–11. Cyclone III Devices Hot-Socketing Specifications  
Symbol  
Parameter  
Maximum  
300 μA  
IIOPIN(DC)  
IIOPIN(AC)  
DC current per I/O pin  
AC current per I/O pin  
8 mA (1)  
Note to Table 1–11:  
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C  
dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.  
Schmitt Trigger Input  
Cyclone III devices support Schmitt trigger input on TDI, TMS, TCK, nSTATUS,  
nCONFIG, nCE, CONF_DONE, and DCLK pins. A Schmitt trigger feature introduces  
hysteresis to the input signal for improved noise immunity, especially for signal with  
slow edge rate. Table 1–12 lists the hysteresis specifications across supported VCCIO  
range for Schmitt trigger inputs in Cyclone III devices.  
Cyclone III Device Handbook, Volume 2  
© January 2010 Altera Corporation