Chapter 4: Embedded Multipliers in the Cyclone III Device Family
Operational Modes
4–7
shows the embedded multiplier configured to support two 9-bit
multipliers.
Figure 4–4. 9-Bit Multiplier Mode
signa
signb
aclr
clock
ena
Data A 0 [8..0]
D
ENA
Q
Data Out 0 [17..0]
D
Q
ENA
CLRN
CLRN
Data B 0 [8..0]
D
ENA
Q
CLRN
9
×
9 Multiplier
Data A 1 [8..0]
D
ENA
Q
Data Out 1 [17..0]
D
Q
ENA
CLRN
CLRN
Data B 1 [8..0]
D
ENA
Q
CLRN
9
×
9 Multiplier
Embedded Multiplier
All 9-bit multiplier inputs and results are independently sent through registers. The
multiplier inputs can accept signed integers, unsigned integers, or a combination of
both. Two 9 × 9 multipliers in the same embedded multiplier block share the same
signa
and
signb
signal. Therefore, all the
Data A
inputs feeding the same embedded
multiplier must have the same sign representation. Similarly, all the
Data B
inputs
feeding the same embedded multiplier must have the same sign representation.
December 2011
Altera Corporation
Cyclone III Device Handbook
Volume 1