欢迎访问ic37.com |
会员登录 免费注册
发布采购

EP3C16Q144C6ES 参数 Datasheet PDF下载

EP3C16Q144C6ES图片预览
型号: EP3C16Q144C6ES
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7308 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号EP3C16Q144C6ES的Datasheet PDF文件第218页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第219页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第220页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第221页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第223页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第224页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第225页浏览型号EP3C16Q144C6ES的Datasheet PDF文件第226页  
9–64
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
ACTIVE_ENGAGE
The
ACTIVE_ENGAGE
instruction allows you to re-engage a disengaged active controller.
You can issue this instruction any time during configuration or user mode to re-
engage an already disengaged active controller as well as trigger reconfiguration of
the Cyclone III device family in the active configuration scheme specified by the
MSEL pin settings.
The
ACTIVE_ENGAGE
instruction functions as the
PULSE_NCONFIG
instruction when the
device is in passive configuration schemes (PS or FPP). The
nCONFIG
pin is disabled
when the
ACTIVE_ENGAGE
instruction is issued.
1
Altera does not recommend using the
ACTIVE_ENGAGE
instruction but it is provided as
a fail-safe instruction for re-engaging the active configuration (AS or AP) controllers.
Changing the Start Boot Address of the AP Flash
In the AP configuration scheme, for Cyclone III devices only, you can change the
default configuration boot address of the parallel flash memory to any desired
address using the
APFC_BOOT_ADDR
JTAG instruction.
APFC_BOOT_ADDR
The
APFC_BOOT_ADDR
instruction is for Cyclone III devices only and allows you to
define a start boot address for the parallel flash memory in the AP configuration
scheme.
This instruction shifts in a start boot address for the AP flash. When this instruction
becomes the active instruction, the
TDI
and
TDO
pins are connected through a 22-bit
active boot address shift register. The shifted-in boot address bits get loaded into the
22-bit AP boot address update register, which feeds into the AP controller. The content
of the AP boot address update register can be captured and shifted-out of the active
boot address shift register from
TDO.
The boot address in the boot address shift register and update register are shifted to
the right (in the LSB direction) by two bits versus the intended boot address. The
reason for this is that the two LSB of the address are not accessible. When this boot
address is fed into the AP controller, two 0s are attached in the end as LSB, thereby
pushing the shifted-in boot address to the left by two bits, which become the actual
AP boot address the AP controller gets.
If you have enabled the remote update feature, the
APFC_BOOT_ADDR
instruction sets
the boot address for the factory configuration only.
1
The
APFC_BOOT_ADDR
instruction is retained after reconfiguration while the system
board is still powered on. However, you must reprogram the instruction whenever
you restart the system board.
Device Configuration Pins
through
describe the connections and functionality of all the
configuration-related pins on Cyclone III device family.
Cyclone III Device Handbook
Volume 1
August 2012 Altera Corporation