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EP3C16Q144C6ES 参数 Datasheet PDF下载

EP3C16Q144C6ES图片预览
型号: EP3C16Q144C6ES
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7308 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Configuration Features
9–19
Single SRAM Object File
The second method configures both the master device and slave devices with the
same
.sof.
The serial configuration device stores one copy of the
.sof.
This setup is
shown in
where the master is set up in AS mode and the slave devices are
set up in PS mode. You must set up one or more slave devices in the chain. All the
slave devices must be set up as shown in
Figure 9–6. Multi-Device AS Configuration where the Devices Receive the Same Data with a Single .sof
V
CCIO
(1)
V
CCIO
(1)
V
CCIO
(1)
10 kΩ
10 kΩ
10 kΩ
Serial Configuration
Device
Master Device of
the
Cyclone III
Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
GND
25
Ω
(5)
Slave Device 1 of
the
Cyclone III
Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
Slave Device 2 of
the
Cyclone III
Device Family
nSTATUS
CONF_DONE
nCONFIG
nCE
GND
nCEO
N.C.
(2)
GND
nCEO
N.C.
(2)
nCEO
N.C.
(2)
DATA
DCLK
nCS
ASDI
50
Ω
(5),(7)
DATA[0]
DCLK
nCSO
(4)
ASDO
(4)
DATA[0]
DCLK
MSEL[3..0]
50
Ω
(7)
(3)
MSEL[3..0]
(3)
DATA[0]
DCLK
MSEL[3..0]
(3)
Buffers (6)
Notes to
(1) Connect the pull-up resistors to the V
CCIO
supply of the bank in which the pin resides.
(2) The
nCEO
pin is left unconnected or used as a user I/O pin when it does not feed the
nCE
pin of another device.
(3) The MSEL pin settings vary for different configuration voltage standards and POR time. You must set the master device of the Cyclone III device
family in AS mode and the slave devices in PS mode. To connect
MSEL[3..0]
for the master device in AS mode and slave devices in PS mode,
refer to
Connect the MSEL pins directly to V
CCA
or GND.
(4) These are dual-purpose I/O pins. The
nCSO
pin functions as the
FLASH_NCE
pin in AP mode. The
ASDO
pin functions as the
DATA[1]
pin in other
AP and FPP modes.
(5) Connect the series resistor at the near end of the serial configuration device.
(6) Connect the repeater buffers between the master and slave devices for
DATA[0]
and
DCLK.
All I/O inputs must maintain a maximum AC voltage
of 4.1 V. The output resistance of the repeater buffers must fit the maximum overshoot equation outlined in
(7) The 50- series resistors are optional if the 3.3-V configuration voltage standard is applied. For optimal signal integrity, connect these 50- series
resistors if the 2.5- or 3.0-V configuration voltage standard is applied.
In this setup, all the Cyclone III device family in the chain are connected for
concurrent configuration. This can reduce the AS configuration time because all the
Cyclone III device family is configured in one configuration cycle. Connect the
nCE
input pins of all the Cyclone III device family to ground. You can either leave the
nCEO
output pins on all the Cyclone III device family unconnected or use the
nCEO
output
pins as normal user I/O pins. The
DATA
and
DCLK
pins are connected in parallel to all
the Cyclone III device family.
August 2012
Altera Corporation
Cyclone III Device Handbook
Volume 1