DC & Switching Characteristics
Table 5–78. Maximum Output Toggle Rate on Stratix II Devices (Part 3 of 5)
Note (1)
Column I/O Pins (MHz)
Row I/O Pins (MHz) Clock Outputs (MHz)
Drive
Strength
I/O Standard
-3
-4
-5
-3
-4
-5
-3
-4
-5
Differential
SSTL-18 Class I
(3)
4 mA
6 mA
200
350
450
500
700
200
400
450
550
300
500
650
700
700
500
550
650
350
500
700
700
700
600
650
700
1,000
1,000
-
150
250
300
400
550
200
350
400
500
300
450
600
650
700
500
500
550
300
500
650
700
700
600
600
650
790
790
-
150
200
300
400
400
150
350
400
450
300
450
600
600
650
450
500
550
300
450
600
650
700
550
600
600
670
670
-
200
150
150
200
350
450
500
650
200
400
450
550
300
500
650
700
700
500
550
550
350
500
700
700
700
600
650
700
150
250
300
400
550
200
350
400
500
300
450
600
650
700
500
500
550
300
500
650
700
700
600
600
650
150
200
300
400
400
150
350
400
450
300
450
600
600
650
450
500
550
300
450
600
650
700
550
600
600
670
670
300
-
350
250
200
8 mA
450
300
300
10 mA
12 mA
8 mA
500
400
400
350
350
297
Differential
SSTL-18 Class II
(3)
-
-
-
16 mA
18 mA
20 mA
4 mA
-
-
-
-
-
-
-
-
-
1.8-V Differential
HSTL Class I (3)
-
-
-
6 mA
-
-
-
8 mA
-
-
-
10 mA
12 mA
16 mA
18 mA
20 mA
4 mA
-
-
-
-
-
-
1.8-V Differential
HSTL Class II (3)
-
-
-
-
-
-
-
-
-
1.5-V Differential
HSTL Class I (3)
-
-
-
6 mA
-
-
-
8 mA
-
-
-
10 mA
12 mA
16 mA
18 mA
20 mA
-
-
-
-
-
-
1.5-V Differential
HSTL Class II (3)
-
-
-
-
-
-
-
-
-
-
-
-
3.3-V PCI
3.3-V PCI-X
LVDS (6)
1,000 790
1,000 790
-
-
-
500
500
500
500
500
500
450
-
400
-
HyperTransport
technology (4), (6)
LVPECL (5)
3.3-V LVTTL
2.5-V LVTTL
-
-
-
-
-
-
450
400
350
400
400
350
300
350
300
OCT 50 Ω
OCT 50 Ω
400
350
400
350
350
300
400
350
400
350
350
300
Altera Corporation
May 2007
5–71
Stratix II Device Handbook, Volume 1