Timing Specifications
Table 5–46. Maximum Output Clock Toggle Rate Derating Factors (Part 1 of 4)
Maximum Output Clock Toggle Rate Derating Factors (ps/pF)
Dedicated Clock
Outputs
Column I/O Pins
–6 –7 –8
Row I/O Pins
–7
Drive
Strength
I/O Standard
–6
–8
–6
–7
–8
Speed Speed Speed Speed Speed Speed Speed Speed Speed
Grade Grade Grade Grade Grade Grade Grade Grade Grade
LVTTL
4 mA
438
306
139
145
65
439
321
179
158
77
439
336
220
172
90
338
267
193
139
74
362
283
198
147
79
387
299
202
156
84
338
267
193
139
74
362
283
198
147
79
387
299
202
156
84
8 mA
12 mA
16 mA
20 mA
24 mA
4 mA
19
20
21
14
18
22
14
18
22
LVCMOS
298
190
43
305
205
72
313
219
101
110
56
197
112
27
205
118
31
214
125
35
197
112
27
205
118
31
214
125
35
8 mA
12 mA
16 mA
20 mA
24 mA
4 mA
87
99
—
—
—
—
—
—
36
46
—
—
—
—
—
—
24
25
27
—
—
—
—
—
—
2.5V
1.8V
228
173
119
64
233
177
121
65
237
180
123
66
270
191
—
306
199
—
343
208
—
270
191
—
306
199
—
343
208
—
8 mA
12 mA
16 mA
2 mA
—
—
—
—
—
—
452
321
227
37
457
347
255
118
72
461
373
283
199
103
10
332
244
178
58
367
291
222
133
85
403
337
266
207
123
44
332
244
178
58
367
291
222
133
85
403
337
266
207
123
44
4 mA
6 mA
8 mA
10 mA
12 mA
2 mA
41
46
46
7
8
13
28
13
28
1.5V
738
499
261
22
764
518
271
25
789
536
282
29
540
300
60
604
354
103
—
669
408
146
—
540
300
60
604
354
103
—
669
408
146
—
4 mA
6 mA
8 mA
—
—
SSTL_2_CLASS_I
8 mA
46
47
49
25
40
56
25
40
56
12 mA
67
69
70
23
42
60
23
42
60
5–52
Altera Corporation
February 2008
Cyclone II Device Handbook, Volume 1