DC Characteristics and Timing Specifications
Table 5–45. Maximum Output Clock Toggle Rate on Cyclone II Devices (Part 2 of 4)
Maximum Output Clock Toggle Rate on Cyclone II Devices (MHz)
Dedicated Clock
Column I/O Pins (1)
Row I/O Pins (1)
Drive
Outputs
I/O Standard
Strength
–6
–7
–8
–6
–7
–8
–6
–7
–8
Speed Speed Speed Speed Speed Speed Speed Speed Speed
Grade Grade Grade Grade Grade Grade Grade Grade Grade
LVCMOS
4 mA
250
280
310
320
350
370
180
280
440
450
120
180
220
240
300
350
80
210
230
260
270
290
310
150
230
370
405
100
150
180
200
250
290
60
170
190
210
220
240
250
120
190
300
350
80
250
280
310
—
210
230
260
—
170
190
210
—
250
280
310
—
210
230
260
—
170
190
210
—
8 mA
12 mA
16 mA
20 mA
24 mA
4 mA
—
—
—
—
—
—
—
—
—
—
—
—
2.5V
1.8V
180
280
—
150
230
—
120
190
—
180
280
—
150
230
—
120
190
—
8 mA
12 mA
16 mA
2 mA
—
—
—
—
—
—
120
180
220
240
300
350
80
100
150
180
200
250
290
60
80
120
180
220
240
300
350
80
100
150
180
200
250
290
60
80
4 mA
120
150
160
210
240
50
120
150
160
210
240
50
120
150
160
210
240
50
6 mA
8 mA
10 mA
12 mA
2 mA
1.5V
4 mA
130
180
230
400
400
350
400
400
260
260
270
280
110
150
190
340
340
290
340
340
220
220
220
230
90
130
180
—
110
150
—
90
130
180
—
110
150
—
90
6 mA
120
160
280
280
240
280
280
180
180
180
190
120
—
120
—
8 mA
SSTL_2_CLASS_I
SSTL_2_CLASS_II
8 mA
400
400
350
—
340
340
290
—
280
280
240
—
400
400
350
—
340
340
290
—
280
280
240
—
12 mA
16 mA
20 mA
24 mA
6 mA
—
—
—
—
—
—
SSTL_18_
CLASS_I
260
260
270
—
220
220
220
—
180
180
180
—
260
260
270
—
220
220
220
—
180
180
180
—
8 mA
10 mA
12 mA
Altera Corporation
February 2008
5–49
Cyclone II Device Handbook, Volume 1