DC Characteristics and Timing Specifications
Final timing numbers are based on actual device operation and testing.
These numbers reflect the actual performance of the device under
worst-case voltage and junction temperature conditions.
Table 5–14. Cyclone II Device Timing Model Status
Device
Speed Grade
Commercial/Industrial
Automotive
Preliminary
Final
EP2C5/A
EP2C8/A
EP2C15A
EP2C20/A
—
v
v
—
Commercial/Industrial
Automotive
—
v
—
v
Commercial/Industrial
Automotive
—
v
—
v
Commercial/Industrial
Automotive
—
v
—
v
EP2C35
EP2C50
EP2C70
Commercial/Industrial
Commercial/Industrial
Commercial/Industrial
—
v
v
v
—
—
Performance
Table 5–15 shows Cyclone II performance for some common designs. All
performance values were obtained with Quartus II software compilation
of LPM, or MegaCore functions for the FIR and FFT designs.
Table 5–15. Cyclone II Performance (Part 1 of 4)
Resources Used
Performance (MHz)
–7 –7
Speed Speed
Grade Grade
M4K
LEs Memory
Blocks
–6
Speed
Grade
–8
Speed
Grade
Applications
DSP
Blocks
(6)
(7)
LE
16-to-1 multiplexer (1)
32-to-1 multiplexer (1)
16-bit counter
21
38
16
64
0
0
0
0
0
0
0
0
385.35 313.97 270.85 286.04
294.2
401.6
260.75 228.78 191.02
349.4 310.65 310.65
64-bit counter
157.15 137.98 126.08 126.27
Altera Corporation
February 2008
5–15
Cyclone II Device Handbook, Volume 1