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EP2C35F672C8N 参数 Datasheet PDF下载

EP2C35F672C8N图片预览
型号: EP2C35F672C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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IEEE Std. 1149.1 (JTAG) Boundary Scan Support  
The Cyclone II device instruction register length is 10 bits and the  
USERCODEregister length is 32 bits. Tables 3–2 and 3–3 show the  
boundary-scan register length and device IDCODEinformation for  
Cyclone II devices.  
Table 3–2. Cyclone II Boundary-Scan Register Length  
Device  
Boundary-Scan Register Length  
EP2C5  
EP2C8  
498  
597  
EP2C15  
EP2C20  
EP2C35  
EP2C50  
EP2C70  
969  
969  
1,449  
1,374  
1,890  
Table 3–3. 32-Bit Cyclone II Device IDCODE  
IDCODE (32 Bits) (1)  
Device  
Version (4 Bits)  
0000  
Part Number (16 Bits)  
0010 0000 1011 0001  
0010 0000 1011 0010  
0010 0000 1011 0011  
0010 0000 1011 0011  
0010 0000 1011 0100  
0010 0000 1011 0101  
0010 0000 1011 0110  
Manufacturer Identity (11 Bits) LSB (1 Bit) (2)  
EP2C5  
EP2C8  
000 0110 1110  
000 0110 1110  
000 0110 1110  
000 0110 1110  
000 0110 1110  
000 0110 1110  
000 0110 1110  
1
1
1
1
1
1
1
0000  
EP2C15  
EP2C20  
EP2C35  
EP2C50  
EP2C70  
0000  
0000  
0000  
0000  
0000  
Notes to Table 3–3:  
(1) The most significant bit (MSB) is on the left.  
(2) The IDCODE’s least significant bit (LSB) is always 1.  
For more information on the Cyclone II JTAG specifications, refer to the  
DC Characteristics & Timing Specifications chapter in the Cyclone II Device  
Handbook, Volume 1.  
3–4  
Cyclone II Device Handbook, Volume 1  
Altera Corporation  
February 2007  
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