DC Characteristics and Timing Specifications
Single-Ended I/O Standards
Tables 5–6 and 5–7 provide operating condition information when using
single-ended I/O standards with Cyclone II devices. Table 5–5 provides
descriptions for the voltage and current symbols used in Tables 5–6 and
5–7.
Table 5–5. Voltage and Current Symbol Definitions
Symbol
Definition
VCCIO
Supply voltage for single-ended inputs and for output drivers
Reference voltage for setting the input switching threshold
Input voltage that indicates a low logic level
VREF
VIL
VIH
Input voltage that indicates a high logic level
Output voltage that indicates a low logic level
Output voltage that indicates a high logic level
Output current condition under which VOL is tested
Output current condition under which VOH is tested
VOL
VOH
IOL
IOH
VTT
Voltage applied to a resistor termination as specified by
HSTL and SSTL standards
Table 5–6. Recommended Operating Conditions for User I/O Pins Using Single-Ended I/O Standards
Note (1) (Part 1 of 2)
VCCIO (V)
VREF (V)
VIL (V)
VIH (V)
I/O Standard
Min
Typ
Max
Min
Typ
Max
Max
Min
3.3-VLVTTLand 3.135
LVCMOS
3.3
3.465
—
—
—
0.8
1.7
2.5-VLVTTLand 2.375
LVCMOS
2.5
1.8
2.625
1.890
—
—
—
—
—
—
0.7
1.7
1.8-VLVTTLand 1.710
LVCMOS
0.35 × VCCIO
0.65 × VCCIO
1.5-V LVCMOS
PCI and PCI-X
SSTL-2 class I
1.425
3.000
2.375
1.5
3.3
2.5
1.575
3.600
2.625
—
—
—
—
—
—
0.35 × VCCIO
0.3 × VCCIO
0.65 × VCCIO
0.5 × VCCIO
1.19
1.25
1.31
VREF – 0.18 (DC) VREF + 0.18 (DC)
VREF – 0.35 (AC) VREF + 0.35 (AC)
SSTL-2 class II
SSTL-18 class I
2.375
1.7
2.5
1.8
2.625
1.9
1.19
1.25
0.9
1.31
VREF – 0.18 (DC) VREF + 0.18 (DC)
VREF – 0.35 (AC) VREF + 0.35 (AC)
0.833
0.969
V
REF – 0.125 (DC) VREF + 0.125 (DC)
VREF – 0.25 (AC) VREF + 0.25 (AC)
Altera Corporation
February 2008
5–5
Cyclone II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
