Supported I/O Standards
f
For information about the I/O standards supported for external memory
applications, refer to the External Memory Interfaces chapter in volume 1
of the Cyclone II Device Handbook.
Table 10–1. Cyclone II Supported I/O Standards and Constraints (Part 1 of 2)
Top and
Bottom I/O
Pins
V
CCIO Level
Side I/O Pins
I/O Standard
Type
CLK, UserI/O CLK,
User I/O
Pins
Input Output
PLL_OUT
DQS
Pins
DQS
3.3-V LVTTL and LVCMOS
2.5-V LVTTL and LVCMOS
1.8-V LVTTL and LVCMOS
1.5-V LVCMOS
Single ended
Single ended
Single ended
Single ended
3.3 V/ 3.3 V
2.5 V
v
v
v
v
v
v
v
v
v
v
3.3 V/ 2.5 V
2.5 V
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
1.8 V/ 1.8 V
1.5 V
1.8 V/ 1.5 V
1.5 V
SSTL-2 class I
Voltage
referenced
2.5 V 2.5 V
2.5 V 2.5 V
1.8 V 1.8 V
1.8 V 1.8 V
1.8 V 1.8 V
1.8 V 1.8 V
1.5 V 1.5 V
1.5 V 1.5 V
3.3 V 3.3 V
SSTL-2 class II
Voltage
referenced
SSTL-18 class I
Voltage
referenced
v
(1)
v
(1)
v
(1)
SSTL-18 class II
Voltage
referenced
HSTL-18 class I
Voltage
referenced
v
(1)
v
(1)
v
(1)
HSTL-18 class II
Voltage
referenced
HSTL-15 class I
Voltage
referenced
v
(1)
v
(1)
v
(1)
HSTL-15 class II
Voltage
referenced
PCI and PCI-X (2)
Single ended
—
—
—
—
v
v
v
Differential SSTL-2 class I or Pseudo
class II
(4)
2.5 V
—
—
—
v
differential (3)
2.5 V
(4)
—
—
v
v
(5)
(5)
Differential SSTL-18 class I Pseudo
(4)
1.8 V
—
—
—
—
—
v (6)
or class II
differential (3)
1.8 V
(4)
—
v
v
(5)
(5)
10–2
Altera Corporation
February 2008
Cyclone II Device Handbook, Volume 1