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EP2C35F484I8N 参数 Datasheet PDF下载

EP2C35F484I8N图片预览
型号: EP2C35F484I8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 现场可编程门阵列可编程逻辑LTE时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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PLLs in Cyclone II Devices  
Figure 7–17. PLL Power Schematic for Cyclone II PLLs  
Ferrite Bead  
1.2V Supply  
10 μF  
GND  
PLL<#>_VCCA  
PLL<#>_GNDA  
.1 µF  
.001 µF  
VCCINT  
PLL<#>VCCD  
PLL<#>_GND  
GND  
Cyclone II Device  
Repeat for Each PLL  
Power & Groundset  
Note to Figure 7–17:  
(1) Applies to PLLs 1 through 4.  
VCCD & GND  
The digital power and ground pins are labeled VCCD_ PLL<PLL number>  
and GND_PLL<PLL number>. The VCCDpin supplies the power for the  
digital circuitry in the PLL. Connect these VCCD pins to the quietest  
digital supply on the board. In most systems, this is the digital 1.2-V  
supply supplied to the device’s VCCINT pins. Connect the VCCD pins to a  
power supply even if you do not use the PLL. When connecting the VCCD  
pins to VCCINT, you do not need any filtering or isolation. You can connect  
the GNDpins directly to the same ground plane as the device’s digital  
ground. See Figure 7–17.  
Cyclone II device PLLs provide you with complete control of device  
clocks and system timing. These PLLs support clock  
Conclusion  
multiplication/division, phase shift, and programmable duty cycle for  
your cost-sensitive clock synthesis applications.  
Altera Corporation  
February 2007  
7–33  
Cyclone II Device Handbook, Volume 1  
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