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EP2C20F256C8N 参数 Datasheet PDF下载

EP2C20F256C8N图片预览
型号: EP2C20F256C8N
PDF下载: 下载PDF文件 查看货源
内容描述: Cyclone II器件手册,卷1 [Cyclone II Device Handbook, Volume 1]
分类和应用: 可编程逻辑PC时钟
文件页数/大小: 470 页 / 5764 K
品牌: ALTERA [ ALTERA CORPORATION ]
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I/O Standards Support  
You can use I/O pins and internal logic to implement a high-speed I/O  
receiver and transmitter in Cyclone II devices. Cyclone II devices do not  
contain dedicated serialization or deserialization circuitry. Therefore,  
shift registers, internal global phase-locked loops (PLLs), and I/O cells  
are used to perform serial-to-parallel conversions on incoming data and  
parallel-to-serial conversion on outgoing data.  
This section provides information on the I/O standards that Cyclone II  
devices support.  
I/O Standards  
Support  
LVDS Standard Support in Cyclone II Devices  
The LVDS I/O standard is a high-speed, low-voltage swing, low power,  
and general purpose I/O interface standard. The Cyclone II device meets  
the ANSI/TIA/EIA-644 standard.  
I/O banks on all four sides of the Cyclone II device support LVDS  
channels. See the pin tables on the Altera web site for the number of LVDS  
channels supported throughout different family members. Cyclone II  
LVDS receivers (input) support a data rate of up to 805 Mbps while LVDS  
transmitters (output) support up to 640 Mbps. The maximum internal  
clock frequency for a receiver and for a transmitter is 402.5 MHz. The  
maximum input data rate of 805 Mbps and the maximum output data  
rate of 640 Mbps is only achieved when DDIO registers are used. The  
LVDS standard does not require an input reference voltage; however, it  
does require a 100-Ωtermination resistor between the two signals at the  
input buffer.  
f
For LVDS data rates in Cyclone II devices with different speed grades,  
see the DC Characteristics & Timing Specifications chapter of the Cyclone II  
Device Handbook.  
Table 11–1 shows LVDS I/O specifications.  
Table 11–1. LVDS I/O Specifications (Part 1 of 2)  
Note (1)  
Symbol Parameter Condition  
Min  
1.15  
2.375  
250  
Typ  
1.2  
2.5  
Max  
1.25  
2.625  
600  
Units  
V
VCCINT  
Supply voltage  
I/O supply voltage  
VCCIO  
VOD  
V
Differential output voltage RL = 100 Ω  
mV  
mV  
ΔVOD  
Change in VOD between RL = 100 Ω  
50  
H and L  
VOS  
Output offset voltage  
RL = 100 Ω  
1.125  
1.25  
1.375  
V
11–4  
Altera Corporation  
February 2007  
Cyclone II Device Handbook, Volume 1  
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