EP220 & EP224 Classic EPLDs
Figure 6 shows the package pin-outs for EP220 and EP224 devices.
Figure 6. EP220 & EP224 Package Pin-Outs
Package outlines not drawn to scale. Windows in ceramic packages only.
3
2
1
20 19
INPUT/CLK
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
I/O
18
17
16
15
14
INPUT
INPUT
INPUT
INPUT
INPUT
4
5
6
7
8
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
EP220
I/O
9
10 11 12 13
I/O
I/O
I/O
INPUT
20-Pin DIP
20-Pin J-Lead
4
3
2
1
28 27 26
25
INPUT/CLK
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
GND
1
24
23
22
21
20
19
18
17
16
15
14
13
VCC
INPUT
I/O
I/O
I/O
I/O
NC
I/O
I/O
I/O
INPUT
INPUT
INPUT
NC
5
2
6
24
23
22
21
20
19
3
7
4
I/O
8
5
I/O
6
I/O
INPUT
9
7
I/O
INPUT
INPUT
10
11
8
I/O
EP224
9
I/O
12 13 14 15 16 17 18
10
11
12
I/O
INPUT
INPUT
24-Pin DIP
28-Pin J-Lead
Refer to “Altera Device Package Outlines” in the Altera 1995 Data Book
for detailed information on package outlines.
Package
Outlines
Altera Corporation
15