Digital Signal Processing Block
The DSP block consists of the following elements:
■
■
Multiplier block
Adder/output block
Multiplier Block
The DSP block multiplier block consists of the input registers, a
multiplier, and pipeline register for pipelining multiply-accumulate and
multiply-add/subtract functions as shown in Figure 4–31.
Figure 4–31. Multiplier Sub-Block Within Stratix GX DSP Block
sign_a (1)
sign_b (1)
aclr[3..0]
clock[3..0]
ena[3..0]
shiftin A
shiftin B
D
Q
Data A
Result
to Adder
blocks
ENA
D
Q
ENA
CLRN
Optional
CLRN
Multiply-Accumulate
and Multiply-Add
Pipeline
D
Q
Data B
ENA
CLRN
shiftout B shiftout A
Note to Figure 4–31:
(1) These signals can be unregistered or registered once to match data path pipelines if required.
4–52
Altera Corporation
February 2005
Stratix GX Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
