Table 4–125. High-Speed I/O Specifications for Flip-Chip Packages (Part 3 of 4) Notes (1), (2)
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Symbol
Conditions
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
SW
PCML (J = 4, 7,
750
750
800
800
ps
8, 10)
PCML (J = 2)
PCML (J = 1)
900
1,500
500
900
1,500
500
1,200
1,700
550
1,200
1,700
550
ps
ps
ps
LVDS and
LVPECL (J = 1)
LVDS,
440
440
500
500
ps
LVPECL,
HyperTransport
technology
(J = 2 through
10)
Input jitter
tolerance
(peak-to-peak)
All
250
160
250
160
250
200
250
200
ps
ps
Output jitter
All
(peak-to-peak)
Output tRISE
LVDS
80
110
170
120
200
80
110
170
120
200
80
110
170
120
200
80
110
170
120
200
ps
ps
HyperTransport
technology
110
110
120
120
LVPECL
PCML
LVDS
90
80
130
110
110
170
150
135
120
200
90
80
130
110
110
170
150
135
120
200
100
80
135
110
110
170
150
135
120
200
100
80
135
110
110
170
150
135
120
200
ps
ps
ps
ps
Output tFALL
80
80
80
80
HyperTransport
technology
110
110
110
110
LVPECL
PCML
90
130
140
160
175
90
130
140
160
175
100
110
135
145
160
175
100
110
135
145
160
175
ps
ps
105
105