Table 4–125. High-Speed I/O Specifications for Flip-Chip Packages (Part 2 of 4) Notes (1), (2)
-5 Speed Grade
Min Typ Max
-6 Speed Grade
Min Typ Max
-7 Speed Grade
Min Typ Max
-8 Speed Grade
Min Typ Max
Symbol
Conditions
Unit
MHz
MHz
MHz
MHz
MHz
fHSCLK (Clock
frequency)
(PCML)
W = 4 to 30
(Serdes used)
10
100
200
200
250
400
10
100
200
200
250
400
10
77.75
10
77.75
W = 2 (Serdes
bypass)
50
50
50
150
50
150
f
W
HSCLK = fHSDR /
W = 2 (Serdes
used)
150
100
300
150
100
300
150
100
300
155.5
200
150
100
300
155.5
200
W = 1 (Serdes
bypass)
W = 1 (Serdes
used)
311
311
f
HSDR Device
J = 10
J = 8
J = 7
J = 4
J = 2
J = 1
All
300
300
300
300
100
100
400
400
400
400
400
250
200
300
300
300
300
100
100
400
400
400
400
400
250
200
300
300
300
300
100
100
311
311
311
311
300
200
300
300
300
300
300
100
100
311
311
311
311
300
200
300
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
ps
operation
(PCML)
TCCS