Operating Conditions
Table 4–7. 1.8-V I/O Specifications
Symbol
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
Minimum
1.65
Maximum
1.95
Unit
V
VCCIO
VIH
VIL
0.65 × VCCIO
–0.3
2.25
V
0.35 × VCCIO
V
VOH
VOL
IOH = –2 to –8 mA (10) VCCIO – 0.45
IOL = 2 to 8 mA (10)
V
0.45
V
Table 4–8. 1.5-V I/O Specifications
Symbol
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Conditions
Minimum
Maximum
Unit
V
VCCIO
1.4
1.6
VIH
VIL
0.65 × VCCIO VCCIO + 0.3
V
–0.3
0.35 × VCCIO
V
VOH
VOL
IOH = –2 mA (10)
IOL = 2 mA (10)
0.75 × VCCIO
V
0.25 × VCCIO
V
Notes to Tables 4–1 through 4–8:
(1) See the Operating Requirements for Altera Devices Data Sheet.
(2) Conditions beyond those listed in Table 4–1 may cause permanent damage to a device. Additionally, device
operation at the absolute maximum ratings for extended periods of time may have adverse affects on the device.
(3) Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents less than
100 mA and periods shorter than 20 ns, or overshoot to the voltage shown in Table 4–9, based on input duty cycle
for input currents less than 100 mA. The overshoot is dependent upon duty cycle of the signal. The DC case is
equivalent to 100% duty cycle.
(4) Maximum VCC rise time is 100 ms, and VCC must rise monotonically.
(5) VCCIO maximum and minimum conditions for LVPECL, LVDS, and 3.3-V PCML are shown in parentheses.
(6) All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before VCCINT and VCCIO are
powered.
(7) Typical values are for TA = 25°C, VCCINT = 1.5 V, and VCCIO = 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
(8) This value is specified for normal device operation. The value may vary during power-up. This applies for all
VCCIO settings (3.3, 2.5, 1.8, and 1.5 V).
(9) Pin pull-up resistance values will lower if an external source drives the pin higher than VCCIO
.
(10) Drive strength is programmable according to the values shown in the Stratix Architecture chapter of the Stratix
Device Handbook, Volume 1.
Table 4–9. Overshoot Input Voltage with Respect to Duty Cycle (Part 1 of 2)
Vin (V)
Maximum Duty Cycle (%)
4.0
4.1
4.2
100
90
50
4–4
Altera Corporation
July 2005
Stratix Device Handbook, Volume 1