DC & Switching Characteristics
Table 4–33. Stratix Device Capacitance Note (5)
Symbol
Parameter
Minimum
Typical
Maximum
Unit
CIOTB
Input capacitance on I/O pins in I/O banks
3, 4, 7, and 8.
11.5
pF
CIOLR
Input capacitance on I/O pins in I/O banks
1, 2, 5, and 6, including high-speed
8.2
pF
differential receiver and transmitter pins.
CCLKTB
CCLKLR
CCLKLR+
Input capacitance on top/bottom clock input
pins: CLK[4:7]and CLK[12:15].
11.5
7.8
pF
pF
pF
Input capacitance on left/right clock inputs:
CLK1, CLK3, CLK8, CLK10.
Input capacitance on left/right clock inputs:
4.4
CLK0, CLK2, CLK9, and CLK11.
Notes to Tables 4–10 through 4–33:
(1) When tx_outclockport of altlvds_txmegafunction is 717 MHz, VOD(m in) = 235 mV on the output clock pin.
(2) Pin pull-up resistance values will lower if an external source drives the pin higher than VCCIO
.
(3) Drive strength is programmable according to the values shown in the Stratix Architecture chapter of the Stratix
Device Handbook, Volume 1.
(4) VREF specifies the center point of the switching range.
(5) Capacitance is sample-tested only. Capacitance is measured using time-domain reflections (TDR). Measurement
accuracy is within 0.5 pF.
(6) VIO and VCM have multiple ranges and values for J=1 through 10.
Altera® offers two ways to calculate power for a design: the Altera web
power calculator and the PowerGauge feature in the Quartus II
software.
Power
Consumption
®
TM
The interactive power calculator on the Altera web site is typically used
prior to designing the FPGA in order to get a magnitude estimate of the
device power. The Quartus II software PowerGauge feature allows you to
apply test vectors against your design for more accurate power
consumption modeling.
In both cases, these calculations should only be used as an estimation of
power, not as a specification.
Stratix devices require a certain amount of power-up current to
successfully power up because of the small process geometry on which
they are fabricated.
Table 4–34 shows the maximum power-up current (ICCINT) required to
power a Stratix device. This specification is for commercial operating
conditions. Measurements were performed with an isolated Stratix
device on the board to characterize the power-up current of an isolated
Altera Corporation
January 2006
4–17
Stratix Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
