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EP1K30TC144-3N 参数 Datasheet PDF下载

EP1K30TC144-3N图片预览
型号: EP1K30TC144-3N
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件LTE
文件页数/大小: 86 页 / 1204 K
品牌: ALTERA [ ALTERA CORPORATION ]
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ACEX 1K Programmable Logic Device Family Data Sheet  
Table 57. EP1K100 External Bidirectional Timing Parameters  
Notes (1), (2)  
Symbol  
Speed Grade  
-2  
Unit  
-1  
-3  
Min  
Max  
Min  
Max  
Min  
Max  
tINSUBIDIR (3)  
tINHBIDIR (3)  
1.7  
0.0  
2.0  
0.0  
2.0  
2.5  
0.0  
2.8  
0.0  
2.0  
3.3  
0.0  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
t
INSUBIDIR (4)  
tINHBIDIR (4)  
OUTCOBIDIR (3)  
tXZBIDIR (3)  
t
5.2  
5.6  
5.6  
3.0  
4.6  
4.6  
6.9  
7.5  
7.5  
4.6  
6.5  
6.5  
2.0  
9.1  
10.1  
10.1  
t
t
ZXBIDIR (3)  
OUTCOBIDIR (4)  
0.5  
0.5  
tXZBIDIR (4)  
ZXBIDIR (4)  
Notes to tables:  
t
13  
(1) All timing parameters are described in Tables 22 through 29 in this data sheet.  
(2) These parameters are specified by characterization.  
(3) This parameter is measured without the use of the ClockLock or ClockBoost circuits.  
(4) This parameter is measured with the use of the ClockLock or ClockBoost circuits.  
The supply power (P) for ACEX 1K devices can be calculated with the  
following equation:  
Power  
Consumption  
P = PINT + PIO = (ICCSTANDBY + ICCACTIVE) × VCC + PIO  
The ICCACTIVE value depends on the switching frequency and the  
application logic. This value is calculated based on the amount of current  
that each LE typically consumes. The PIO value, which depends on the  
device output load characteristics and switching frequency, can be  
calculated using the guidelines given in Application Note 74 (Evaluating  
Power for Altera Devices).  
1
Compared to the rest of the device, the embedded array  
consumes a negligible amount of power. Therefore, the  
embedded array can be ignored when calculating supply  
current.  
Altera Corporation  
81  
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