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EP1K30TC144-3N 参数 Datasheet PDF下载

EP1K30TC144-3N图片预览
型号: EP1K30TC144-3N
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程逻辑器件系列 [Programmable Logic Device Family]
分类和应用: 可编程逻辑器件LTE
文件页数/大小: 86 页 / 1204 K
品牌: ALTERA [ ALTERA CORPORATION ]
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ACEX 1K Programmable Logic Device Family Data Sheet  
Table 36. EP1K10 External Bidirectional Timing Parameters  
Notes (1), (3)  
Symbol  
Speed Grade  
-2  
Unit  
-1  
-3  
Min  
Max  
Min  
Max  
Min  
Max  
tINSUBIDIR (2)  
tINHBIDIR (2)  
tOUTCOBIDIR (2)  
tXZBIDIR (2)  
2.2  
0.0  
2.0  
2.3  
0.0  
2.0  
3.2  
0.0  
2.0  
ns  
ns  
ns  
ns  
ns  
6.6  
8.8  
8.8  
7.8  
9.6  
14.0  
14.0  
11.2  
11.2  
tZXBIDIR (2)  
tINSUBIDIR (4)  
tINHBIDIR (4)  
tOUTCOBIDIR (4)  
tXZBIDIR(4)  
3.1  
0.0  
0.5  
3.3  
0.0  
0.5  
5.1  
7.3  
7.3  
6.4  
9.2  
9.2  
ns  
ns  
ns  
tZXBIDIR (4)  
Notes to tables:  
13  
(1) All timing parameters are described in Tables 22 through 29 in this data sheet.  
(2) This parameter is measured without the use of the ClockLock or ClockBoost circuits.  
(3) These parameters are specified by characterization.  
(4) This parameter is measured with the use of the ClockLock or ClockBoost circuits.  
Tables 37 through 43 show EP1K30 device internal and external timing  
parameters.  
Table 37. EP1K30 Device LE Timing Microparameters (Part 1 of 2)  
Note (1)  
Symbol  
Speed Grade  
-2  
Unit  
-1  
-3  
Min  
Max  
Min  
Max  
Min  
Max  
tLUT  
0.7  
0.5  
0.6  
0.3  
0.6  
0.1  
0.4  
0.1  
0.6  
0.0  
0.3  
0.8  
0.6  
0.7  
0.4  
0.8  
0.1  
0.5  
0.1  
0.8  
0.0  
0.4  
1.1  
0.8  
1.0  
0.5  
1.0  
0.2  
0.7  
0.2  
1.0  
0.0  
0.5  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tCLUT  
tRLUT  
tPACKED  
tEN  
tCICO  
tCGEN  
tCGENR  
tCASC  
tC  
tCO  
Altera Corporation  
65  
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