ACEX 1K Programmable Logic Device Family Data Sheet
Table 34. EP1K10 Device Interconnect Timing Microparameters
Note (1)
Symbol
Speed Grade
-2
Unit
-1
-3
Min
Max
Min
Max
Min
Max
tDIN2IOE
2.3
0.8
1.1
2.3
0.8
0.1
1.8
0.3
2.1
3.9
3.3
0.3
0.9
2.7
1.1
1.4
2.7
1.1
0.1
2.1
0.4
2.5
4.6
3.7
0.4
1.0
3.6
1.4
1.8
3.6
1.4
0.2
2.9
0.7
3.6
6.5
4.8
0.5
1.4
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tDIN2LE
tDIN2DATA
tDCLK2IOE
tDCLK2LE
tSAMELAB
tSAMEROW
tSAMECOLUMN
tDIFFROW
tTWOROWS
tLEPERIPH
tLABCARRY
tLABCASC
Table 35. EP1K10 External Timing Parameters
Note (1)
Symbol
Speed Grade
-2
Unit
-1
-3
Min
Max
Min
Max
Min
Max
tDRR
7.5
9.5
12.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tINSU (2), (3)
tINH (2), (3)
tOUTCO (2), (3)
tINSU (4), (3)
tINH (4), (3)
tOUTCO (4), (3)
tPCISU (3)
2.4
0.0
2.0
1.4
0.5
0.0
3.0
0.0
2.0
2.7
0.0
2.0
1.7
0.5
0.0
4.2
0.0
2.0
3.6
0.0
2.0
–
6.6
5.1
7.8
6.4
9.6
–
–
–
6.4
–
tPCIH (3)
tPCICO (3)
6.0
7.5
2.0
10.2
64
Altera Corporation
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