Timing Model
Table 4–29. Cyclone Global Clock External I/O Timing Parameters
Notes (1), (2) (Part 2 of 2)
Conditions
Symbol
Parameter
tOUTCOPLL
Clock-to-output delay output or bidirectional pin using IOE
output register with global clock enhanced PLL with default
phase setting
CLOAD = 10 pF
Notes to Table 4–29:
(1) These timing parameters are sample-tested only.
(2) These timing parameters are for IOE pins using a 3.3-V LVTTL, 24-mA setting. Designers should use the Quartus II
software to verify the external timing for any pin.
Tables 4–30 through 4–31 show the external timing parameters on column
and row pins for EP1C3 devices.
Table 4–30. EP1C3 Column Pin Global Clock External I/O Timing
Parameters
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Symbol
Unit
Min
Max
4.073
2.306
Min
Max
4.682
2.651
Min
Max
5.295
2.998
tINSU
3.085
0.000
2.000
1.795
0.000
0.500
3.547
0.000
2.000
2.063
0.000
0.500
4.009
0.000
2.000
2.332
0.000
0.500
ns
ns
ns
ns
ns
ns
tINH
tOUTCO
tINSUPLL
tINHPLL
tOUTCOPLL
Table 4–31. EP1C3 Row Pin Global Clock External I/O Timing Parameters
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Symbol
Unit
Min
Max
3.984
2.217
Min
Max
4.580
2.549
Min
Max
5.180
2.883
tINSU
3.157
0.000
2.000
1.867
0.000
0.500
3.630
0.000
2.000
2.146
0.000
0.500
4.103
0.000
2.000
2.426
0.000
0.500
ns
ns
ns
ns
ns
ns
tINH
tOUTCO
tINSUPLL
tINHPLL
tOUTCOPLL
Altera Corporation
January 2007
4–17
Preliminary
ALTERA [ ALTERA CORPORATION ]
