4–4
Chapter 4: DC and Switching Characteristics
Operating Conditions
Table 4–6. Arria GX Transceiver Block AC Specification (Part 1 of 3)
–6 Speed Grade Commercial and
Industrial
Symbol / Description
Conditions
Units
Min
Typ
Max
Reference clock
Input reference clock frequency
Absolute VM A X for a REFCLKPin
Absolute VMIN for a REFCLKPin
Rise/Fall time
—
—
—
—
—
—
50
—
—
—
—
0.2
—
—
622.08
3.3
MHz
V
–0.3
—
—
V
—
UI
Duty cycle
45
55
%
Peak to peak differential input voltage VID
(diff p-p)
200
2000
mV
Spread spectrum clocking (1)
On-chip termination resistors
VICM (AC coupled)
0 to –0.5%
30
—
33
kHz
—
—
115 20%
1200 5%
—
mV
V
VICM (DC coupled) (2)
PCI Express
(PIPE) mode
0.25
0.55
—
2000 +/-1%
RREFB
Transceiver Clocks
Calibration block clock frequency
—
—
10
30
—
—
125
—
MHz
ns
Calibration block minimum power-down
pulse width
fixedclkclock frequency (3)
reconfigclock frequency
—
125 10%
—
MHz
MHz
SDI mode
2.5
50
—
Transceiver block minimum power-down
pulse width
—
100
—
ns
Receiver
Data rate
—
600
—
—
—
—
—
3125
2.0
Mbps
Absolute VMAX for a receiver pin (4)
Absolute VMIN for a receiver pin
—
—
V
V
V
–0.4
—
—
Maximum peak-to-peak differential input
voltage VID (diff p-p)
Vicm = 0.85 V
3.3
Minimum peak-to-peak differential input
voltage VID (diff p-p)
DC Gain = 3 dB
—
160
—
—
mV
On-chip termination resistors
100 15%
Vicm = 0.85 V
setting
850 10% 850 10% 850 10%
mV
VICM (15)
Vicm = 1.2 V
setting
1200
10%
1200
10%
1200
10%
mV
BW = Low
BW = Med
BW = High
—
—
—
30
40
50
—
—
—
Bandwidth at 3.125 Gbps
MHz
Arria GX Device Handbook, Volume 1
© December 2009 Altera Corporation
ALTERA [ ALTERA CORPORATION ]
