Classic EPLD Family Data Sheet
Figure 2. Classic Output Enable/Clock Select
Mode 0
Global
Clock
AND
Array
CLK
VCC
OE
Output Enable/Clock
Select
In Mode 0, the register
is clocked by the global
clock signal. The
output is enabled by
the logic from the
product term.
Data
Q
OE = Product Term
CLK = Global
CLR
Macrocell
Output Buffer
Mode 1
Global
Clock
VCC
OE
Output Enable/Clock
Select
In Mode 1, the output
AND
is permanently enabled
Array
and the register is
clocked by the product
term, which allows
gated clocks to be
generated.
OE = Enabled
CLK = Product Term
CLK
Data
Q
CLR
Macrocell
Output Buffer
Feedback Select
Each macrocell in a Classic device provides feedback selection that is
controlled by the feedback multiplexer. This feedback selection allows the
designer to feed either the macrocell output or the I/O pin input
associated with the macrocell back into the
AND
array. The macrocell
output can be either the
Q
output of the programmable register or the
combinatorial output of the macrocell. Different devices have different
feedback multiplexer configurations. See
Figure 3.
Figure 3. Classic Feedback Multiplexer Configurations
Global Feedback Multiplexer
Global
EP610
EP610I
EP910
EP910I
Q
I/O
Quadrant Feedback Multiplexer
Quadrant
EP1810
Q
I/O
Dual Feedback Multiplexer
Quadrant
Global
EP1810
Q
I/O
Altera Corporation
749
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