FLEX 10K Embedded Programmable Logic Family Data Sheet
Table 70. EPF10K100 Device External Timing Parameters
Note (1)
Symbol
Speed Grade
-3
Unit
-3DX
-4
Min
Max
Min
Max
Min
Max
t
t
t
t
t
t
19.1
19.1
24.2
ns
ns
ns
ns
ns
ns
DRR
(2), (3), (4)
7.8
2.0
0.0
6.2
2.0
7.8
2.0
0.0
8.5
2.0
0.0
INSU
(3), (4)
11.1
6.7
11.1
–
14.3
–
OUTCO
(3)
INH
(2), (3), (5)
INSU
OUTCO
(3), (5)
Table 71. EPF10K100 Device External Bidirectional Timing Parameters
Note (1)
Symbol
Speed Grade
-3
Unit
-3DX
-4
Min
Max
Min
Max
Min
Max
t
t
t
t
t
t
t
t
t
t
(4)
8.1
0.0
2.0
8.1
0.0
2.0
10.4
0.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
INSUBIDIR
(4)
INHBIDIR
OUTCOBIDIR
(4)
11.1
15.3
15.3
11.1
15.3
15.3
2.0
14.3
18.4
18.4
(4)
(4)
XZBIDIR
ZXBIDIR
(5)
9.1
0.0
2.0
–
–
–
–
–
–
INSUBIDIR
(5)
INHBIDIR
(5)
7.2
14.3
14.3
–
–
–
–
–
–
OUTCOBIDIR
(5)
(5)
XZBIDIR
ZXBIDIR
Notes to tables:
(1) All timing parameters are described in Tables 32 through 39 in this data sheet.
(2) Using an LE to register the signal may provide a lower setup time.
(3) This parameter is specified by characterization.
(4) This parameter is measured without the use of the ClockLock or ClockBoost circuits.
(5) This parameter is measured with the use of the ClockLock or ClockBoost circuits.
86
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