FLEX 10K Embedded Programmable Logic Family Data Sheet
Table 69. EPF10K100 Device Interconnect Timing Microparameters
Note (1)
Symbol
Speed Grade
-3
Unit
-3DX
-4
Min
Max
Min
Max
Min
Max
t
t
t
t
10.3
4.8
7.3
6.2
10.3
4.8
7.3
6.2
12.2
6.0
ns
ns
ns
ns
DIN2IOE
DIN2LE
11.0
7.7
DIN2DATA
DCLK2IOE
without ClockLock or
ClockBoost circuitry
t
with ClockLock or ClockBoost
2.3
4.8
2.3
–
4.8
–
–
6.0
–
ns
ns
ns
DCLK2IOE
circuitry
t
without ClockLock or
DCLK2LE
ClockBoost circuitry
with ClockLock or ClockBoost
t
DCLK2LE
circuitry
t
t
t
t
t
t
t
t
0.4
4.9
0.4
4.9
0.5
5.5
ns
ns
ns
ns
ns
ns
ns
ns
SAMELAB
SAMEROW
SAMECOLUMN
DIFFROW
5.1
5.1
5.4
10.0
14.9
6.9
10.0
14.9
6.9
10.9
16.4
8.1
TWOROWS
LEPERIPH
LABCARRY
LABCASC
0.9
0.9
1.1
3.0
3.0
3.2
Altera Corporation
85
ALTERA [ ALTERA CORPORATION ]
