FLEX 10K Embedded Programmable Logic Family Data Sheet
Table 25. EPF10K50V & EPF10K130V Device Capacitance
Note (11)
Symbol
Parameter
Conditions
Min
Max
Unit
C
C
Input capacitance
V
V
= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz
10
15
pF
pF
IN
IN
Input capacitance on dedicated
clock pin
INCLK
IN
C
Output capacitance
V
= 0 V, f = 1.0 MHz
10
pF
OUT
OUT
Notes to tables:
(1) See the Operating Requirements for Altera Devices Data Sheet.
(2) Minimum DC input voltage is –0.5 V. During transitions, the inputs may
undershoot to –2.0 V or overshoot to 5.75 V for input currents less than 100 mA and
periods shorter than 20 ns.
(3) Numbers in parentheses are for industrial-temperature-range devices.
(4) Maximum VCC rise time is 100 ms. VCC must rise monotonically.
(5) EPF10K50V and EPF10K130V device inputs may be driven before VCCINT and
VCCIO are powered.
(6) Typical values are for TA = 25° C and VCC = 3.3 V.
(7) These values are specified under the EPF10K50V and EPF10K130V device
recommended operating conditions in Table 23 on page 47.
(8) The IOH parameter refers to high-level TTL or CMOS output current.
(9) The IOL parameter refers to low-level TTL or CMOS output current. This parameter
applies to open-drain pins as well as output pins.
(10) This parameter applies to -1 speed grade EPF10K50V devices, -2 speed grade
EPF10K50V industrial temperature devices, and -2 speed grade EPF10K130V
devices.
(11) Capacitance is sample-tested only.
Figure 21 shows the typical output drive characteristics of EPF10K50V
and EPF10K130V devices.
Figure 21. Output Drive Characteristics of EPF10K50V & EPF10K130V Devices
60
Typical I
Output
Current (mA)
IOL
O
40
20
V
= 3.3 V
cc
Room Temperature
IOH
1
2
3
VO Output Voltage (V)
48
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