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DSF10K 参数 Datasheet PDF下载

DSF10K图片预览
型号: DSF10K
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式可编程逻辑系列 [EMBEDDED PROGRAMMABLE LOGIC FAMILY]
分类和应用: 可编程逻辑
文件页数/大小: 138 页 / 1955 K
品牌: ALTERA [ ALTERA CORPORATION ]
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FLEX 10K Embedded Programmable Logic Family Data Sheet  
LE Operating Modes  
The FLEX 10K LE can operate in the following four modes:  
Normal mode  
Arithmetic mode  
Up/down counter mode  
Clearable counter mode  
Each of these modes uses LE resources differently. In each mode, seven  
available inputs to the LE—the four data inputs from the LAB local  
interconnect, the feedback from the programmable register, and the  
carry-in and cascade-in from the previous LE—are directed to different  
destinations to implement the desired logic function. Three inputs to the  
LE provide clock, clear, and preset control for the register. Quartus and  
MAX+PLUS II software packages, in conjunction with parameterized  
functions such as LPM and DesignWare functions, automatically chooses  
the appropriate mode for common functions such as counters, adders,  
and multipliers. If required, the designer can also create special-purpose  
functions which use a specific LE operating mode for optimal  
performance.  
The architecture provides a synchronous clock enable to the register in all  
four modes. Quartus and MAX+PLUS II software packages can set DATA1  
to enable the register synchronously, providing easy implementation of  
fully synchronous designs.  
Figure 9 shows the LE operating modes.  
18  
Altera Corporation  
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