FLEX 10K Embedded Programmable Logic Family Data Sheet
Table 122. FLEX 10K Pin-Outs (Part 1 of 3)
Note (1)
Pin Name
503-Pin PGA
EPF10K100
599-Pin PGA
EPF10K130V
EPF10K250A
600-Pin BGA
EPF10K100A
600-Pin BGA
EPF10K130V
EPF10K250A
MSEL0(2)
AT40
F6
F5
F5
MSEL1(2)
nSTATUS(2)
nCONFIG(2)
DCLK(2)
AV40
AY4
AY40
H40
F4
C3
C1
C1
E43
B4
D32
D4
D32
D4
BE5
AP1
AP1
CONF_DONE(2)
INIT_DONE(3)
nCE(2)
BC43
AM40
BB6
AM32
AE32
AN2
AM32
AE32
AN2
V6
K40
H4
nCEO(2)
BF44
BB40
BA37
AY38
BA39
AW47
AY42
BD14
BA17
BB16
BF12
BG11
BG9
AP35
AR29
AM28
AL29
AN29
AG35
AM34
AM13
AR12
AN12
AP11
AM11
AR10
AN10
AM4
AP35
AR29
AM28
AL29
AN29
AG35
AM34
AM13
AR12
AN12
AP11
AM11
AR10
AN10
AM4
nWS(4)
A3
nRS(4)
C5
nCS(4)
C1
CS(4)
C3
RDYnBSY(4)
CLKUSR(4)
DATA7(4)
DATA6(4)
DATA5(4)
DATA4(4)
DATA3(4)
DATA2(4)
DATA1(4)
DATA0(2), (5)
TDI(2)
T6
H6
E29
D30
C31
B32
D32
B34
E33
F40
M40
K4
BF10
BC5
BF4
AN1
AN1
TDO(2)
BB42
BE43
F42
AN34
AL31
C35
AN34
AL31
C35
TCK(2)
D4
TMS(2)
AT4
AV4
TRST(2)
B46
C34
C34
Dedicated Inputs
D20, D24, AY24,
AY20
B24, C25, BG25,
BG23
C18, D18, AM18,
AN18
C18, D18, AM18,
AN18
Dedicated Clock
Pins
D22, AY22
BF24, A25
AL18, E18
AL18, E18
LOCK (12)
AV14
AY22
F22
–
–
–
GCLK1 (13)
DEV_CLRn(3)
–
–
–
BE23
AR17
AR17
134
Altera Corporation