欢迎访问ic37.com |
会员登录 免费注册
发布采购

DPCLK0 参数 Datasheet PDF下载

DPCLK0图片预览
型号: DPCLK0
PDF下载: 下载PDF文件 查看货源
内容描述: 的Cyclone III器件手册 [Cyclone III Device Handbook]
分类和应用:
文件页数/大小: 274 页 / 7302 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号DPCLK0的Datasheet PDF文件第164页浏览型号DPCLK0的Datasheet PDF文件第165页浏览型号DPCLK0的Datasheet PDF文件第166页浏览型号DPCLK0的Datasheet PDF文件第167页浏览型号DPCLK0的Datasheet PDF文件第169页浏览型号DPCLK0的Datasheet PDF文件第170页浏览型号DPCLK0的Datasheet PDF文件第171页浏览型号DPCLK0的Datasheet PDF文件第172页  
9–10  
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family  
Configuration Features  
Initialization  
In Cyclone III device family, the clock source for initialization is either a 10-MHz  
(typical) internal oscillator (separate from the AS internal oscillator) or an optional  
CLKUSRpin. By default, the internal oscillator is the clock source for initialization. If  
you use the internal oscillator, the device provides itself with enough clock cycles for a  
proper initialization. When using the internal oscillator, you do not need to send  
additional clock cycles from an external source to the CLKUSRpin during the  
initialization stage. Additionally, you can use the CLKUSRpin as a user I/O pin.  
You also have the flexibility to synchronize initialization of multiple devices or to  
delay initialization with the CLKUSR option. The CLKUSRpin allows you to control  
when your device enters user mode for an indefinite amount of time. You can turn on  
the Enable user-supplied start-up clock (CLKUSR) option in the Quartus II software  
from the General tab of the Device and Pin Options dialog box. When you turn on  
the Enable user supplied start-up clock option (CLKUSR) option, the CLKUSRpin is  
the initialization clock source. Supplying a clock on the CLKUSRpin does not affect the  
configuration process. After the configuration data is accepted and CONF_DONEgoes  
high, the Cyclone III device family requires a certain amount of clock cycles to  
initialize and to enter user mode.  
Table 9–5 lists the required clock cycles for proper initialization in Cyclone III device  
family.  
Table 9–5. Initialization Clock Cycles Required in Cyclone III Device Family  
Device  
Initialization Clock Cycles  
Cyclone III  
3,185  
3,192  
Cyclone III LS  
Table 9–6 lists the maximum CLKUSR frequency (fMAX) for Cyclone III device family.  
Table 9–6. Maximum CLKUSR Frequency for Cyclone III Device Family  
Device  
fMAX (MHz)  
133  
Cyclone III  
Cyclone III LS  
100  
1
If you use the optional CLKUSRpin and the nCONFIGpin is pulled low to restart  
configuration during device initialization, ensure that the CLKUSRpin continues to  
toggle when nSTATUSis low (a maximum of 230 s).  
User Mode  
An optional INIT_DONEpin is available that signals the end of initialization and the  
start of user mode with a low-to-high transition. The Enable INIT_DONE Output  
option is available in the Quartus II software from the General tab of the Device and  
Pin Options dialog box. If you use the INIT_DONEpin, it is high due to an external  
10-kpull-up resistor when nCONFIGis low and during the beginning of  
configuration. After the option bit to enable INIT_DONEis programmed into the device  
Cyclone III Device Handbook  
Volume 1  
August 2012 Altera Corporation  
 复制成功!