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CLK12P 参数 Datasheet PDF下载

CLK12P图片预览
型号: CLK12P
PDF下载: 下载PDF文件 查看货源
内容描述: 的Stratix II器件手册,卷1 [Stratix II Device Handbook, Volume 1]
分类和应用:
文件页数/大小: 768 页 / 5210 K
品牌: ALTERA [ ALTERA CORPORATION ]
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PLLs in Stratix II and Stratix II GX Devices  
The parameters for these changes are: charge_pump_current,  
loop_filter_r, and loop_filter_c. Each parameter supports the  
specific range of values listed in Table 1–16.  
Table 1–16. Advanced Loop Filter Parameters  
Parameter  
Values  
Resistor values (k)  
(1)  
(1)  
(1)  
High-frequency capacitance values (pF)  
Charge pump current settings (  
Note to Table 1–16:  
(1) For more information, see AN 367: Implementing PLL Reconfiguration in  
Stratix II Devices.  
f
For more information about Quartus II software support of  
reconfigurable bandwidth, see the Design Example: Dynamic PLL  
Reconfiguration section in volume 3, Verification, of the Quartus II  
Development Software Handbook.  
PLLs use several divide counters and different VCO phase taps to  
perform frequency synthesis and phase shifts. In Stratix II and  
Stratix II GX enhanced and fast PLLs, the counter value and phase are  
configurable in real time. In addition, you can change the loop filter and  
charge pump components, which affect the PLL bandwidth, on the fly.  
You can control these PLL components to update the output clock  
frequency, PLL bandwidth, and phase-shift variation in real time, without  
the need to reconfigure the entire FPGA.  
PLL  
Reconfiguration  
f
For more information about PLL reconfiguration, see AN 367:  
Implementing PLL Reconfiguration in Stratix II Devices.  
Digital clocks are square waves with short rise times and a 50% duty  
cycle. These high-speed clocks concentrate a significant amount of energy  
in a narrow bandwidth at the target frequency and at the higher  
frequency harmonics. This results in high energy peaks and increased  
electromagnetic interference (EMI). The radiated noise from the energy  
peaks travels in free air and, if not minimized, can lead to corrupted data  
and intermittent system errors, which can jeopardize system reliability.  
Spread-  
Spectrum  
Clocking  
Traditional methods for limiting EMI include shielding, filtering, and  
multi-layer printed circuit boards (PCBs). However, these methods  
significantly increase the overall system cost and sometimes are not  
Altera Corporation  
July 2009  
1–51  
Stratix II Device Handbook, Volume 2  
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