欢迎访问ic37.com |
会员登录 免费注册
发布采购

CLK12P 参数 Datasheet PDF下载

CLK12P图片预览
型号: CLK12P
PDF下载: 下载PDF文件 查看货源
内容描述: 的Stratix II器件手册,卷1 [Stratix II Device Handbook, Volume 1]
分类和应用:
文件页数/大小: 768 页 / 5210 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号CLK12P的Datasheet PDF文件第145页浏览型号CLK12P的Datasheet PDF文件第146页浏览型号CLK12P的Datasheet PDF文件第147页浏览型号CLK12P的Datasheet PDF文件第148页浏览型号CLK12P的Datasheet PDF文件第150页浏览型号CLK12P的Datasheet PDF文件第151页浏览型号CLK12P的Datasheet PDF文件第152页浏览型号CLK12P的Datasheet PDF文件第153页  
DC & Switching Characteristics  
Table 5–3. Stratix II Device Recommended Operating Conditions (Part 2 of 2)  
Note (1)  
Symbol  
Parameter  
Conditions  
Minimum Maximum Unit  
TJ  
Operating junction temperature  
For commercial use  
For industrial use  
For military use (7)  
0
85  
°C  
°C  
°C  
–40  
–55  
100  
125  
Notes to Table 5–3:  
(1) Supply voltage specifications apply to voltage readings taken at the device pins, not at the power supply.  
(2) During transitions, the inputs may overshoot to the voltage shown in Table 5–2 based upon the input duty cycle.  
The DC case is equivalent to 100% duty cycle. During transitions, the inputs may undershoot to –2.0 V for input  
currents less than 100 mA and periods shorter than 20 ns.  
(3) Maximum VCC rise time is 100 ms, and VCC must rise monotonically from ground to VCC  
.
(4) VCCPD must ramp-up from 0 V to 3.3 V within 100 μs to 100 ms. If VC CPD is not ramped up within this specified  
time, your Stratix II device does not configure successfully. If your system does not allow for a VCCPD ramp-up time  
of 100 ms or less, you must hold nCONFIGlow until all power supplies are reliable.  
(5) All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before VCCINT, VCCPD, and VCCIO  
are powered.  
(6) VC CIO maximum and minimum conditions for PCI and PCI-X are shown in parentheses.  
(7) For more information, refer to the Stratix II Military Temperature Range Support technical brief.  
DC Electrical Characteristics  
Table 5–4 shows the Stratix II device family DC electrical characteristics.  
Table 5–4. Stratix II Device DC Operating Conditions (Part 1 of 2)  
Symbol Parameter Conditions  
Note (1)  
Minimum Typical Maximum Unit  
II  
IOZ  
Input pin leakage current VI = VCCIOmax to 0 V (2)  
–10  
–10  
10  
10  
μA  
μA  
Tri-stated I/O pin  
leakage current  
VO = VCCIOmax to 0 V (2)  
ICCINT0 VCCINT supply current  
(standby)  
VI = ground, no  
load, no toggling  
inputs  
EP2S15  
0.25  
0.30  
0.50  
0.62  
0.82  
1.12  
2.2  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
(3)  
A
A
EP2S30  
EP2S60  
EP2S90  
EP2S130  
EP2S180  
EP2S15  
EP2S30  
EP2S60  
EP2S90  
EP2S130  
EP2S180  
A
TJ = 25° C  
A
A
A
ICCPD0  
VCCPD supply current  
(standby)  
VI = ground, no  
load, no toggling  
inputs  
TJ = 25° C,  
VCCPD = 3.3V  
mA  
mA  
mA  
mA  
mA  
mA  
2.7  
3.6  
4.3  
5.4  
6.8  
Altera Corporation  
April 2011  
5–3  
Stratix II Device Handbook, Volume 1