欢迎访问ic37.com |
会员登录 免费注册
发布采购

A8237 参数 Datasheet PDF下载

A8237图片预览
型号: A8237
PDF下载: 下载PDF文件 查看货源
内容描述: 可编程DMA控制器 [PROGRAMMABLE DMA CONTROLLER]
分类和应用: 控制器
文件页数/大小: 22 页 / 254 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号A8237的Datasheet PDF文件第9页浏览型号A8237的Datasheet PDF文件第10页浏览型号A8237的Datasheet PDF文件第11页浏览型号A8237的Datasheet PDF文件第12页浏览型号A8237的Datasheet PDF文件第14页浏览型号A8237的Datasheet PDF文件第15页浏览型号A8237的Datasheet PDF文件第16页浏览型号A8237的Datasheet PDF文件第17页  
a8237 Programmable DMA Controller Data Sheet  
Clear Byte Pointer Command  
The byte pointer is a single-bit internal register that selects either the least  
significant or most significant byte of the 16-bit registers in the a8237. The  
byte pointer allows microprocessor write and read operations via the 8-bit  
data bus. The clear byte pointer command is a write command that resets  
the byte pointer, allowing subsequent access to the least significant byte  
of any 16-bit register. The data bus value for the clear byte pointer  
command is ignored. The resetinput and the master clear command  
resets the byte pointer.  
Set Byte Pointer Command  
The set byte pointer command is a read command that sets the byte  
pointer, allowing subsequent access to the most significant byte of any  
16-bit register. The data bus value for the set byte pointer command is  
unknown. The byte pointer is reset by the resetinput and the master  
clear command.  
Master Clear Command  
The master clear command performs the same function as the reset  
input. This command resets the command, status, request, temporary and  
byte pointer registers, mode register counter, state machine, and also sets  
the mask register.  
Clear Mask Register Command  
The clear mask register command is a write command that resets the 4-bit  
mask register, enabling DMA requests from the dreqinputs. The data bus  
value for the clear mask register command is ignored.  
Clear Mode Register Counter Command  
The clear mode register counter command is a read command that resets  
the 2-bit mode register counter. This counter is incremented after each  
subsequent read of the mode register, allowing the user to cycle through  
all four mode registers. The data bus value for the clear mode register  
counter command is unknown.  
This section describes the following a8237MegaCore function  
operations:  
Operation  
State machine  
Transfer modes  
Other operations  
Altera Corporation  
17