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5M2210ZF256C5N 参数 Datasheet PDF下载

5M2210ZF256C5N图片预览
型号: 5M2210ZF256C5N
PDF下载: 下载PDF文件 查看货源
内容描述: 3.直流和开关特性的MAX V器件 [3. DC and Switching Characteristics for MAX V Devices]
分类和应用: 可编程逻辑器件开关LTEPC时钟
文件页数/大小: 30 页 / 489 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 3: DC and Switching Characteristics for MAX V Devices  
3–7  
Operating Conditions  
Table 3–9. 1.5-V I/O Specifications for MAX V Devices  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
1.425  
Maximum  
1.575  
Unit  
V
VIH  
High-level input voltage  
Low-level input voltage  
High-level output voltage  
Low-level output voltage  
0.65 × VCCIO  
–0.3  
VCCIO + 0.3 (2)  
0.35 × VCCIO  
V
VIL  
V
VOH  
IOH = –2 mA (1)  
IOL = 2 mA (1)  
0.75 × VCCIO  
V
VOL  
0.25 × VCCIO  
V
Notes to Table 3–9:  
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the  
MAX V Device Architecture chapter.  
(2) This maximum VIH reflects the JEDEC specification. The MAX V input buffer can tolerate a VIH maximum of 4.0, as specified by the VI parameter  
in Table 3–2 on page 3–2.  
Table 3–10. 1.2-V I/O Specifications for MAX V Devices  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
1.14  
Maximum  
1.26  
Unit  
V
VIH  
High-level input voltage  
Low-level input voltage  
High-level output voltage  
Low-level output voltage  
0.8 × VCCIO  
–0.3  
VCCIO + 0.3  
0.25 × VCCIO  
V
VIL  
V
VOH  
IOH = –2 mA (1)  
IOL = 2 mA (1)  
0.75 × VCCIO  
V
VOL  
0.25 × VCCIO  
V
Note to Table 3–10:  
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the  
MAX V Device Architecture chapter.  
Table 3–11. 3.3-V PCI Specifications for MAX V Devices (Note 1)  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
3.0  
Typical  
3.3  
Maximum  
3.6  
Unit  
V
V
V
V
V
VIH  
High-level input voltage  
Low-level input voltage  
High-level output voltage  
Low-level output voltage  
0.5 × VCCIO  
–0.5  
VCCIO + 0.5  
0.3 × VCCIO  
VIL  
VOH  
IOH = –500 µA  
IOL = 1.5 mA  
0.9 × VCCIO  
VOL  
0.1 × VCCIO  
Note to Table 3–11:  
(1) 3.3-V PCI I/O standard is only supported in Bank 3 of the 5M1270Z and 5M2210Z devices.  
Table 3–12. LVDS Specifications for MAX V Devices (Note 1)  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
2.375  
247  
Typical  
2.5  
Maximum  
2.625  
Unit  
V
VOD  
VOS  
Differential output voltage swing  
Output offset voltage  
600  
mV  
V
1.125  
1.25  
1.375  
Note to Table 3–12:  
(1) Supports emulated LVDS output using a three-resistor network (LVDS_E_3R).  
May 2011 Altera Corporation  
MAX V Device Handbook  
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