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5M2210ZF256C5N 参数 Datasheet PDF下载

5M2210ZF256C5N图片预览
型号: 5M2210ZF256C5N
PDF下载: 下载PDF文件 查看货源
内容描述: 3.直流和开关特性的MAX V器件 [3. DC and Switching Characteristics for MAX V Devices]
分类和应用: 可编程逻辑器件开关LTEPC时钟
文件页数/大小: 30 页 / 489 K
品牌: ALTERA [ ALTERA CORPORATION ]
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3–6  
Chapter 3: DC and Switching Characteristics for MAX V Devices  
Operating Conditions  
Table 3–6. 3.3-V LVCMOS Specifications for MAX V Devices  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
3.0  
Maximum  
3.6  
Unit  
V
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
1.7  
4.0  
V
–0.5  
0.8  
V
V
CCIO = 3.0,  
IOH = –0.1 mA (1)  
CCIO = 3.0,  
IOL = 0.1 mA (1)  
VOH  
High-level output voltage  
Low-level output voltage  
VCCIO – 0.2  
V
V
V
VOL  
0.2  
Note to Table 3–6:  
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the  
MAX V Device Architecture chapter.  
Table 3–7. 2.5-V I/O Specifications for MAX V Devices  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
2.375  
1.7  
Maximum  
2.625  
4.0  
Unit  
V
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
V
–0.5  
2.1  
0.7  
V
IOH = –0.1 mA (1)  
IOH = –1 mA (1)  
IOH = –2 mA (1)  
IOL = 0.1 mA (1)  
IOL = 1 mA (1)  
IOL = 2 mA (1)  
V
VOH  
High-level output voltage  
Low-level output voltage  
2.0  
V
1.7  
V
0.2  
V
VOL  
0.4  
V
0.7  
V
Note to Table 3–7:  
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the  
MAX V Device Architecture chapter.  
Table 3–8. 1.8-V I/O Specifications for MAX V Devices  
Symbol  
VCCIO  
Parameter  
I/O supply voltage  
Conditions  
Minimum  
1.71  
Maximum  
1.89  
Unit  
V
VIH  
High-level input voltage  
Low-level input voltage  
High-level output voltage  
Low-level output voltage  
0.65 × VCCIO  
–0.3  
2.25 (2)  
0.35 × VCCIO  
V
VIL  
V
VOH  
IOH = –2 mA (1)  
IOL = 2 mA (1)  
VCCIO – 0.45  
V
VOL  
0.45  
V
Notes to Table 3–8:  
(1) This specification is supported across all the programmable drive strength settings available for this I/O standard, as shown in the  
MAX V Device Architecture chapter.  
(2) This maximum VIH reflects the JEDEC specification. The MAX V input buffer can tolerate a VIH maximum of 4.0, as specified by the VI parameter  
in Table 3–2 on page 3–2.  
MAX V Device Handbook  
May 2011 Altera Corporation  
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