欢迎访问ic37.com |
会员登录 免费注册
发布采购

5M1270ZT64A4N 参数 Datasheet PDF下载

5M1270ZT64A4N图片预览
型号: 5M1270ZT64A4N
PDF下载: 下载PDF文件 查看货源
内容描述: MAX V器件手册 [MAX V Device Handbook]
分类和应用:
文件页数/大小: 166 页 / 4016 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号5M1270ZT64A4N的Datasheet PDF文件第36页浏览型号5M1270ZT64A4N的Datasheet PDF文件第37页浏览型号5M1270ZT64A4N的Datasheet PDF文件第38页浏览型号5M1270ZT64A4N的Datasheet PDF文件第39页浏览型号5M1270ZT64A4N的Datasheet PDF文件第41页浏览型号5M1270ZT64A4N的Datasheet PDF文件第42页浏览型号5M1270ZT64A4N的Datasheet PDF文件第43页浏览型号5M1270ZT64A4N的Datasheet PDF文件第44页  
2–28  
Chapter 2: MAX V Architecture  
I/O Structure  
I/O Blocks  
The IOEs are located in I/O blocks around the periphery of the MAX V device. There  
are up to seven IOEs per row I/O block and up to four IOEs per column I/O block.  
Each column or row I/O block interfaces with its adjacent LAB and MultiTrack  
interconnect to distribute signals throughout the device. The row I/O blocks drive  
row, column, or DirectLink interconnects. The column I/O blocks drive column  
interconnects.  
1
5M40Z, 5M80Z, 5M160Z, and 5M240Z devices have a maximum of five IOEs per row  
I/O block.  
Figure 2–20 shows how a row I/O block connects to the logic array.  
Figure 2–20. Row I/O Block Connection to the Interconnect (Note 1)  
R4 Interconnects  
C4 Interconnects  
I/O Block Local  
Interconnect  
data_out  
[6..0]  
7
OE  
[6..0]  
7
LAB  
Row  
I/O Block  
fast_out  
[6..0]  
7
7
data_in[6..0]  
Direct Link  
Interconnect  
from Adjacent LAB  
Direct Link  
Interconnect  
Row I/O Block  
Contains up to  
Seven IOEs  
to Adjacent LAB  
LAB Column  
clock [3..0]  
LAB Local  
Interconnect  
Note to Figure 2–20:  
(1) Each of the seven IOEs in the row I/O block can have one data_outor fast_outoutput, one OEoutput, and  
one data_ininput.  
MAX V Device Handbook  
December 2010 Altera Corporation  
 复制成功!