AV-51002
2017.02.10
1-23
Switching Characteristics
•
Transceiver Specifications for Arria V GT and ST Devices on page 1-29
Provides the specifications for transmitter, receiver, and reference clock I/O pin.
Switching Characteristics
is section provides performance characteristics of Arria V core and periphery blocks.
Transceiver Performance Specifications
Transceiver Specifications for Arria V GX and SX Devices
Table 1-20: Reference Clock Specifications for Arria V GX and SX Devices
Transceiver Speed Grade 4
Transceiver Speed Grade 6
Min Typ Max
Symbol/Description
Condition
Unit
Min
Typ
Max
Supported I/O standards
1.2 V PCML, 1.4 V PCML,1.5 V PCML, 2.5 V PCML, Differential LVPECL(23), HCSL, and LVDS
Input frequency from
—
27
—
—
—
—
—
710
400
400
55
27
—
—
—
—
—
710
400
400
55
MHz
ps
REFCLKinput pins
Rise time
Fall time
Duty cycle
Measure at 60 mV of
differential signal(24)
Measure at 60 mV of
ps
differential signal(24)
—
—
45
—
—
45
—
—
%
Peak-to-peak differential
200
300(25)
/
200
300(25)
/
mV
input voltage
2000
2000
(23)
(24)
(25)
Differential LVPECL signal levels must comply to the minimum and maximum peak-to-peak differential input voltage specified in this table.
REFCLKperformance requires to meet transmitter REFCLKphase noise specification.
e maximum peak-to peak differential input voltage of 300 mV is allowed for DC coupled link.
Arria V GX, GT, SX, and ST Device Datasheet
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