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5AGXMA1D431C3ES 参数 Datasheet PDF下载

5AGXMA1D431C3ES图片预览
型号: 5AGXMA1D431C3ES
PDF下载: 下载PDF文件 查看货源
内容描述: 阿里亚V器件概述 [Arria V Device Overview]
分类和应用:
文件页数/大小: 37 页 / 793 K
品牌: ALTERA [ ALTERA CORPORATION ]
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AV-51001  
2013.05.06  
18  
Embedded Memory Blocks  
Independent Input and Output Multiplications Operator  
9 x 9 Multi- 18 x 18 Mul- 27 x 27 Mul- 36 x 36 Mul-  
18 x 18 Mul-  
18 x 18 Mul- tiplier Adder  
tiplier Adder Summed  
Mem-  
ber  
Code  
Variable-  
precision  
DSP Block  
Variant  
plier  
tiplier  
tiplier  
tiplier  
Mode  
with 36 bit  
Input  
E1  
E3  
E5  
E7  
B3  
B5  
D3  
D5  
800  
1,044  
1,092  
1,139  
809  
2,400  
3,132  
3,276  
3,417  
2,427  
3,270  
2,427  
3,270  
1,600  
2,088  
2,184  
2,278  
1,618  
2,180  
1,618  
2,180  
800  
1,044  
1,092  
1,139  
809  
400  
522  
546  
569  
800  
1,044  
1,092  
1,139  
809  
800  
1,044  
1,092  
1,139  
809  
Arria V  
GZ  
Arria V  
SX  
1,090  
809  
1,090  
809  
1,090  
809  
1,090  
809  
Arria V  
ST  
1,090  
1,090  
1,090  
1,090  
Embedded Memory Blocks  
The embedded memory blocks in the devices are flexible and designed to provide an optimal amount of  
small- and large-sized memory arrays to fit your design requirements.  
Types of Embedded Memory  
The Arria V devices contain two types of memory blocks:  
20 Kb M20K or 10 Kb M10K blocksblocks of dedicated memory resources. The M20K and M10K  
blocks are ideal for larger memory arrays while still providing a large number of independent ports.  
640 bit memory logic array blocks (MLABs)enhanced memory blocks that are configured from  
dual-purpose logic array blocks (LABs). The MLABs are ideal for wide and shallow memory arrays. The  
MLABs are optimized for implementation of shift registers for digital signal processing (DSP) applications,  
wide shallow FIFO buffers, and filter delay lines. Each MLAB is made up of ten adaptive logic modules  
(ALMs). In the Arria V devices, you can configure these ALMs as ten 32 x 2 blocks, giving you one 32 x 20  
simple dual-port SRAM block per MLAB. You can also configure these ALMs, in Arria V GZ devices, as  
ten 64 x 1 blocks, giving you one 64 x 10 simple dual-port SRAM block per MLAB.  
Arria V Device Overview  
Altera Corporation  
Feedback  
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