Chapter 1: Overview for the Arria V Device Family
1–7
Low-Power Serial Transceivers
Low-Power Serial Transceivers
Arria V devices deliver the industry’s lowest power 10-Gbps transceivers at less than
140 mW and 6-Gbps transceivers at less than 100 mW power consumption per
channel. Arria V transceivers are designed to be standard compliant for a wide range
of protocols and data rates.
The transceivers are positioned on the left and right outer edges of the device, as
shown in Figure 1–1.
(1), (2)
Figure 1–1. Device Chip Overview for Arria V Devices
General Purpose I/Os (LVDS, Memory Interface)
Integrated Multiport Memory Controllers
ALM
M10K Internal Memory Blocks
Variable-Precision DSP Blocks
Integrated Multiport Memory Controllers
General Purpose I/Os (LVDS, Memory Interface)
Notes to Figure 1–1:
(1) This figure represents an Arria V device with transceivers. Other Arria V devices may have a different floor plan than the one shown here.
(2) This figure is a graphical representation of a top view of the silicon die, which corresponds to a reverse view for flip chip packages.
February 2012 Altera Corporation
Arria V Device Handbook
Volume 1: Device Overview and Datasheet