2–48
Chapter 2: Device Datasheet for Arria V Devices
Glossary
Glossary
Table 2–48 lists the glossary for this chapter.
Table 2–48. Glossary Table (Part 1 of 4)
Letter
Subject
Definitions
A
B
C
—
—
Receiver Input Waveforms
Single-Ended Waveform
Positive Channel (p) = V
IH
V
ID
Negative Channel (n) = V
Ground
IL
V
CM
Differential Waveform
V
ID
p - n = 0 V
V
ID
Differential I/O
Standards
D
Transmitter Output Waveforms
Single-Ended Waveform
Positive Channel (p) = V
OH
V
OD
Negative Channel (n) = V
Ground
OL
V
CM
Differential Waveform
V
OD
p - n = 0 V
V
OD
E
F
—
—
fHSCLK
Left/right PLL input clock frequency.
High-speed I/O block—Maximum/minimum LVDS data transfer rate
(fHSDR = 1/TUI), non-DPA.
fHSDR
High-speed I/O block—Maximum/minimum LVDS data transfer rate
(fHSDRDPA = 1/TUI), DPA.
fHSDRDPA
G
H
I
—
—
Arria V Device Handbook
Volume 1: Device Overview and Datasheet
February 2012 Altera Corporation