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5AGTMA1D427C4N 参数 Datasheet PDF下载

5AGTMA1D427C4N图片预览
型号: 5AGTMA1D427C4N
PDF下载: 下载PDF文件 查看货源
内容描述: 阿里亚V器件手册 [Arria V Device Handbook]
分类和应用:
文件页数/大小: 82 页 / 1787 K
品牌: ALTERA [ ALTERA CORPORATION ]
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Chapter 1: Overview for the Arria V Device Family  
1–19  
SoC FPGA with HPS  
You can boot the HPS before you power up and configure the FPGA fabric. After  
the system is running, the HPS reconfigures the FPGA fabric at any time under  
program control or through the FPGA configuration controller.  
You can power up both the HPS and the FPGA fabric together, configure the FPGA  
fabric first, and then upload the boot code to the HPS from the FPGA fabric.  
Hardware and Software Development  
For hardware development, you can configure the HPS and connect your soft logic in  
the FPGA fabric to the HPS interfaces using the Qsys system integration tool in the  
Quartus II software.  
For software development, the ARM-based SoC FPGA devices inherit the rich  
software development ecosystem available for the ARM Cortex-A9 MPCore  
processor. The software development process for Altera SoC FPGAs follows the same  
steps as those for other SoC devices. Altera also provides support for the Linux and  
VxWorks® operating systems.  
You can begin device-specific firmware and software development on the Altera  
SoC FPGA Virtual Target. The Virtual Target is a PC-based fast-functional simulation  
of a target development system—a model of a complete development board that runs  
on a PC. The Virtual Target enables the development of device-specific production  
software that can run unmodified on actual hardware.  
February 2012 Altera Corporation  
Arria V Device Handbook  
Volume 1: Device Overview and Datasheet  
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