AS6UA51216
Data retention characteristics (over the operating range)
Parameter
V
CC
for data retention
Data retention current
Chip deselect to data retention time
Operation recovery time
Symbol
V
DR
I
CCDR
t
CDR
t
R
Test conditions
V
CC
= 1.2V
CS
≥
V
CC
– 0.1V or
UB = LB = > V
CC
– 0.1V
V
IN
≥
V
CC
– 0.1V or
V
IN
≤
0.1V
Min
1.2V
–
0
t
RC
Max
3.6
2
–
–
Unit
V
mA
ns
ns
Data retention waveform
Data retention mode
V
CC
V
CC
t
CDR
CS
V
IH
V
DR
V
IH
V
DR
≥
1.2V
V
CC
t
R
AC test loads and waveforms
V
CC
OUTPUT
30 pF
R2
INCLUDING
JIG AND
SCOPE
INCLUDING
JIG AND
SCOPE
R1
V
CC
OUTPUT
5 pF
R2
V
CC
Typ
GND
(b)
Thevenin equivalent:
R1
OUTPUT
R
TH
V
ALL INPUT PULSES
90%
10%
< 5 ns
(c)
90%
10%
(a)
Parameters
R1
R2
R
TH
V
TH
Notes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V
CC
= 3.0V
1105
1550
645
1.75V
V
CC
= 2.5V
16670
15380
8000
1.2V
V
CC
= 2.0V
15294
11300
6500
0.85V
Unit
Ohms
Ohms
Ohms
Volts
During V
CC
power-up, a pull-up resistor to V
CC
on CS is required to meet I
SB
specification.
This parameter is sampled, but not 100% tested.
For test conditions, see
AC Test Conditions.
t
CLZ
and t
CHZ
are specified with C
L
= 5pF as in Figure C. Transition is measured ±500 mV from steady-state voltage.
This parameter is guaranteed, but not tested.
WE is HIGH for read cycle.
CS and OE are LOW for read cycle.
Address valid prior to or coincident with CS transition LOW.
All read cycle timings are referenced from the last valid address to the first transitioning address.
CS or WE must be HIGH during address transitions. Either CS or WE asserting high terminates a write cycle.
All write cycle timings are referenced from the last valid address to the first transitioning address.
N/A.
1.2V data retention applies to commercial and industrial temperature range operations.
C = 30pF, except at high Z and low Z parameters, where C = 5pF.
6
ALLIANCE SEMICONDUCTOR
6/27/00
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
