February 2007
AS6C62256
®
32K X 8 BIT LOW POWER CMOS SRAM
PIN CONFIGURATION
A14
A12
A7
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE#
A13
A8
3
OE#
A11
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
A6
4
A5
5
A9
A8
A4
6
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A13
WE#
Vcc
A14
A12
A7
A6
A5
A4
A3
A3
7
AS6C62256
A2
8
A1
9
A0
10
11
12
13
14
A1
A2
DQ0
DQ1
DQ2
Vss
sTSOP
PDIP/SOP
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
RATING
-0.5 to 7.0
UNIT
V
Terminal Voltage with Respect to VSS
VTERM
0 to 70(C grade)
ºC
Operating Temperature
TA
ºC
-40 to 85(I grade)
Storage Temperature
TSTG
PD
-65 to 150
Power Dissipation
1
W
mA
ºC
DC Output Current
IOUT
50
Soldering Temperature (under 10 sec)
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TSOLDER
260
TRUTH TABLE
CE#
H
OE#
X
WE#
X
SUPPLY CURRENT
ISB,ISB1
MODE
I/O OPERATION
Standby
High-Z
L
L
L
H
L
H
H
L
Output Disable
Read
High-Z
DOUT
DIN
ICC,ICC1
ICC,ICC1
X
Write
ICC,ICC1
Note: H = VIH, L = VIL, X = Don't care.
02/FEB/07, v1.0
Alliance Memory Inc.
Page 2 of 12
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
