AS6C3216
32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM
Rev. 1.0
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
SYMBOL
A0 – A20
A-1 – A20
DESCRIPTION
Vcc
Vss
Address Inputs(word mode)
Address Inputs(byte mode)
A0~A20
/A-1~A20
2048Kx16/4096Kx8
MEMORY ARRAY
DECODER
DQ0 – DQ15 Data Inputs/Outputs
CE#, CE2
WE#
OE#
Chip Enable Input
Write Enable Input
Output Enable Input
Lower Byte Control
Upper Byte Control
Byte Enable
LB#
UB#
DQ0-DQ7
Lower Byte
BYTE#
VCC
I/O DATA
CIRCUIT
COLUMN I/O
DQ8-DQ15
Upper Byte
Power Supply
VSS
Ground
CE#
CE2
WE#
OE#
LB#
CONTROL
CIRCUIT
UB#
BYTE#
Alliance Memory, Inc.
2