AS5LC2M16
&
ꢅꢆ
Capacitance (f = 1 MHz, T = Room temperature, V = NOMINAL)
a
CC
Parameter
Input capacitance
I/O capacitance
Symbol
CIN
Signals
A, CS1, CS2, WE, OE, LB, UB
I/O
Test conditions
Max
5
Unit
pF
VIN = 0V
CI/O
VIN = VOUT = 0V
7
pF
ꢀꢁꢄ
Read cycle (over the operating range)
–55
–70
–85
Parameter
Read cycle time
Symbol
tRC
Min
Max
–
Min
70
–
Max
Min
85
–
Max
Unit
Notes
55
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address access time
tAA
55
55
25
–
70
70
35
–
85
85
40
–
3
3
Chip select (CS1) access time
Output enable (OE) access time
Output hold from address change
CS1ꢁꢊꢆꢋꢁꢇo output in low Z
CS1 high to output in high Z
OE low to output in low Z
UB/LB access time
tACS
tOE
–
–
–
–
–
–
tOH
tCLZ
tCHZ
tOLZ
tBA
10
10
0
10
10
0
10
10
0
5
–
–
–
4, 5
4, 5
4, 5
20
–
25
–
25
–
5
5
5
–
55
–
–
70
–
–
85
–
UB/LB low to low Z
tBLZ
tBHZ
tOHZ
tPC
10
0
10
0
10
0
4, 5
4, 5
4, 5
UB/LB high to high Z
OE high to output in high Z
Page cycle time
20
20
20
15
25
25
25
20
25
25
25
20
0
0
0
–
–
–
Page access time
tPA
–
–
–
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
ꢀꢁꢂꢁꢃꢁꢄ
Read waveform 1 (address controlled)
(CS1
=
OE
=
Low, WE=High, UB and/or LB=Low)
t
RC
Address
t
AA
t
t
OH
OH
D
Previous data valid
Data valid
OUT
2/15/02; V.0.9.6
Alliance Semiconductor
P. 4 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
