AS4LC4M16S0
AS4LC16M4S0
®
AC parameters common to all waveforms
Sym
Parameter
-75
CAS
latency Min Max
15
20
20
44
66
1
2
1
1
3
2
3
2
3
2
7.5
10
5.4
6
2.7
3
2.5
2.5
1.5
0.8
1
3
2
–
–
0.8
1.5
0.8
1.5
0.8
1.5
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
6
6
–
–
–
–
–
–
-8
Min
20
20
20
50
70
1
2
1
1
8
10
6
6
3
3
3
3
2
1
1
–
–
1
2
1
2
1
2
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7
7
–
–
–
–
–
–
20
20
20
50
70
1
2
1
1
10
15
6
6
3
3
3
3
2
1
1
–
–
1
2
1
2
1
2
-10F
Min
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7
7
–
–
–
–
–
–
Min
20
30
30
60
90
1
2
1
1
10
15
6
6
3
3
3
3
2
1
1
–
–
1
2
1
2
1
2
-10
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
7
7
–
–
–
–
–
–
Unit Notes
ns
ns
ns
ns
ns
CLK
CLK
CLK
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
2
2
2
3
4
4
4,5,7
4,5,7
4,5,7
4,5,7
6
6
6
6
5
t
RRD
Row active to row active delay
t
RCD
RAS to CAS delay time
t
RP
Row precharge
t
RAS
Row active
tRC Row cycle time
t
CDL
Last data in to new column
address delay
t
RDL
Last data in to row precharge
t
BDL
Last data in to burst stop
t
CCD
Column address to column
address delay
t
CK
CLK cycle time
t
AC
CLK to valid output delay @ 50pF
t
OH
Output data hold time @ 50 pF
t
CH
CLK high pulse width
t
CL
CLK low pulse width
t
AS
Add setup time
t
AH
Add hold time
t
SLZ
CLK to output in low Z
t
SHZ
CLK to output in high Z
t
CKH
CKE hold time
t
CKS
CKE setup time
t
CMH
t
CMS
CS, RAS, CAS, WE, DQM hold
time
CS, RAS, CAS, WE, DQM setup
time
t
DH
Data in hold time
t
DS
Data in setup time
8
ALLIANCE SEMICONDUCTOR
7/5/00
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
