March 2001
®
AS4C4M4EOQ
AS4C4M4E1Q
4M
✕
4 CMOS QuadCAS DRAM (EDO) family
Features
• Organization: 4,194,304 words × 4 bits
• High speed
- 50/60 ns RAS access time
- 25/30 ns column address access time
- 12/15 ns CAS access time
• Low power consumption
- Active: 495 mW max
- Standby: 5.5 mW max, CMOS I/O
• Extended data out
• Refresh
- 4096 refresh cycles, 64 ms refresh interval for
4C4M4EOQ
- 2048 refresh cycles, 32 ms refresh interval for
AS4C4M4E1Q
- RAS-only and hidden refresh or CAS-before-RAS refresh
or self-refresh
• TTL-compatible
• 4 separate CAS pins allow for separate I/O operation
• JEDEC standard package
- 300 mil, 28-pin SOJ
- 300 mil, 28-pin TSOP
• 5V power supply
• Latch-up current
≥
200 mA
• ESD protection
≥
2000 mV
Pin arrangement
SOJ
V
CC
I/O0
I/O1
WE
RAS
*NC/A11
CAS0
CAS1
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
I/O3
I/O2
CAS3
OE
A9
CAS2
NC
A8
A7
A6
A5
A4
GND
V
CC
I/O0
I/O1
WE
RAS
*NC/A11
CAS0
CAS1
A10
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
Pin designation
TSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
I/O3
I/O2
CAS3
OE
A9
CAS2
NC
A8
A7
A6
A5
A4
GND
Pin(s)
A0 to A11
RAS
CAS
WE
I/O0 to I/O3
OE
V
CC
GND
NC
Description
Address inputs
Row address strobe
Column address strobe
Write enable
Input/output
Output enable
Power
Ground
No Connection
AS4C4M4E0
11
12
13
14
* NC on 2K refresh version; A11 on 4K refresh version
Selection guide
Symbol
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum hyper page mode cycle time
Maximum operating current
Maximum CMOS standby current
3/22/01; v.1.0
AS4C4M4E0
4C4M4EOQ/E1Q-50
50
25
12
13
85
20
110
1.0
4C4M4EOQ/E1-60
60
30
15
15
100
24
100
1.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
P. 1 of 16
t
RAC
t
CAA
t
CAC
t
OEA
t
RC
t
PC
I
CC1
I
CC5
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